[src/netbsd-9]: src/sys/arch/aarch64/aarch64 Pull up following revision(s) (r...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8386fed00516
branches:  netbsd-9
changeset: 454589:8386fed00516
user:      martin <martin%NetBSD.org@localhost>
date:      Sun Sep 22 12:27:22 2019 +0000

description:
Pull up following revision(s) (requested by jmcneill in ticket #221):

        sys/arch/aarch64/aarch64/cpufunc.c: revision 1.6

Do not attempt to change coherency_unit at runtime. Instead, if the
required coherency unit is greater than COHERENCY_UNIT in a MULTIPROCESSOR
kernel, just panic instead.

This makes non-MULTIPROCESSOR kernels work again.

diffstat:

 sys/arch/aarch64/aarch64/cpufunc.c |  13 +++++++++----
 1 files changed, 9 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r b6b7e8190b29 -r 8386fed00516 sys/arch/aarch64/aarch64/cpufunc.c
--- a/sys/arch/aarch64/aarch64/cpufunc.c        Sun Sep 22 12:25:25 2019 +0000
+++ b/sys/arch/aarch64/aarch64/cpufunc.c        Sun Sep 22 12:27:22 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.5 2018/12/21 08:01:01 ryo Exp $  */
+/*     $NetBSD: cpufunc.c,v 1.5.4.1 2019/09/22 12:27:22 martin Exp $   */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -26,8 +26,10 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "opt_multiprocessor.h"
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.5 2018/12/21 08:01:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.5.4.1 2019/09/22 12:27:22 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -135,9 +137,12 @@
                arm_dcache_align = sizeof(int) << arm_dcache_maxline;
                arm_dcache_align_mask = arm_dcache_align - 1;
        }
-       /* update coherency_unit (in param.h) */
+
+#ifdef MULTIPROCESSOR
        if (coherency_unit < arm_dcache_align)
-               coherency_unit = arm_dcache_align;
+               panic("coherency_unit %ld < arm_dcache_align %d; increase COHERENCY_UNIT",
+                   coherency_unit, arm_dcache_align);
+#endif
 
        /*
         * CLIDR -  Cache Level ID Register