[src/trunk]: src/sys/arch/x86/include Switch to the new PTE naming. No binary...

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d4bc8afc97c2
branches:  trunk
changeset: 455040:d4bc8afc97c2
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat Oct 05 07:30:03 2019 +0000

description:
Switch to the new PTE naming. No binary diff (tested with MKREPRO).

diffstat:

 sys/arch/x86/include/pmap.h |  10 +++++-----
 sys/arch/x86/include/pte.h  |  10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diffs (62 lines):

diff -r f27e1a11e8f3 -r d4bc8afc97c2 sys/arch/x86/include/pmap.h
--- a/sys/arch/x86/include/pmap.h       Sat Oct 05 07:19:49 2019 +0000
+++ b/sys/arch/x86/include/pmap.h       Sat Oct 05 07:30:03 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.h,v 1.102 2019/08/07 06:23:48 maxv Exp $  */
+/*     $NetBSD: pmap.h,v 1.103 2019/10/05 07:30:03 maxv Exp $  */
 
 /*
  * Copyright (c) 1997 Charles D. Cranor and Washington University.
@@ -315,8 +315,8 @@
  */
 extern u_long PDPpaddr;
 
-extern pd_entry_t pmap_pg_g;                   /* do we support PG_G? */
-extern pd_entry_t pmap_pg_nx;                  /* do we support PG_NX? */
+extern pd_entry_t pmap_pg_g;                   /* do we support PTE_G? */
+extern pd_entry_t pmap_pg_nx;                  /* do we support PTE_NX? */
 extern int pmap_largepages;
 extern long nkptp[PTP_LEVELS];
 
@@ -526,7 +526,7 @@
        KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
 
        pde = L2_BASE + pl2_i(va);
-       if (*pde & PG_PS)
+       if (*pde & PTE_PS)
                return ((pt_entry_t *)pde);
 
        return (PTE_BASE + pl1_i(va));
@@ -560,7 +560,7 @@
        va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
        up_pte = (pt_entry_t *) va;
 
-       return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
+       return (paddr_t) (((*up_pte) & PTE_FRAME) + (((vaddr_t) pte) & (~PTE_FRAME & ~VA_SIGN_MASK)));
 }
 
 /* Xen helpers to change bits of a pte */
diff -r f27e1a11e8f3 -r d4bc8afc97c2 sys/arch/x86/include/pte.h
--- a/sys/arch/x86/include/pte.h        Sat Oct 05 07:19:49 2019 +0000
+++ b/sys/arch/x86/include/pte.h        Sat Oct 05 07:30:03 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pte.h,v 1.1 2010/07/06 20:50:35 cegger Exp $   */
+/*     $NetBSD: pte.h,v 1.2 2019/10/05 07:30:03 maxv Exp $     */
 
 /*
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -33,10 +33,10 @@
 #define _X86_PTE_H
 
 /* Cacheability bits when we are using PAT */
-#define PGC_WB          0               /* The default */
-#define PGC_WC          PG_WT           /* WT and CD is WC */
-#define PGC_UCMINUS     PG_N            /* UC but mtrr can override */
-#define PGC_UC          (PG_WT | PG_N)  /* hard UC */
+#define PGC_WB         0                       /* The default */
+#define PGC_WC         PTE_PWT                 /* WT and CD is WC */
+#define PGC_UCMINUS    PTE_PCD                 /* UC but mtrr can override */
+#define PGC_UC         (PTE_PWT | PTE_PCD)     /* hard UC */
 
 /*
  * page protection exception bits