[src/trunk]: src/sys/arch/arm/dts Fix PMU interrupt numbers on Allwinner A64.

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7df973774dd8
branches:  trunk
changeset: 460896:7df973774dd8
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Fri Nov 08 11:12:09 2019 +0000

description:
Fix PMU interrupt numbers on Allwinner A64.

diffstat:

 sys/arch/arm/dts/sun50i-a64.dtsi |  10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diffs (24 lines):

diff -r b5a751b1b99d -r 7df973774dd8 sys/arch/arm/dts/sun50i-a64.dtsi
--- a/sys/arch/arm/dts/sun50i-a64.dtsi  Fri Nov 08 11:06:21 2019 +0000
+++ b/sys/arch/arm/dts/sun50i-a64.dtsi  Fri Nov 08 11:12:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64.dtsi,v 1.11 2019/06/06 23:19:45 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64.dtsi,v 1.12 2019/11/08 11:12:09 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -51,6 +51,14 @@
                        #thermal-sensor-cells = <0>;
                };
        };
+
+       /* PMU interrupt numbers are wrong in mainline dts */
+       pmu {
+               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+       };
 };
 
 &cpu0 {