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[src/trunk]: src/sys/dev/ic Select the correct MPLL and PHY settings for the ...



details:   https://anonhg.NetBSD.org/src/rev/9b52314f8a62
branches:  trunk
changeset: 460920:9b52314f8a62
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Nov 10 10:36:01 2019 +0000

description:
Select the correct MPLL and PHY settings for the requested pixel clock

diffstat:

 sys/dev/ic/dw_hdmi_phy.c |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r 49288e9e5708 -r 9b52314f8a62 sys/dev/ic/dw_hdmi_phy.c
--- a/sys/dev/ic/dw_hdmi_phy.c  Sun Nov 10 10:31:38 2019 +0000
+++ b/sys/dev/ic/dw_hdmi_phy.c  Sun Nov 10 10:36:01 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dw_hdmi_phy.c,v 1.1 2019/11/09 23:27:50 jmcneill Exp $ */
+/* $NetBSD: dw_hdmi_phy.c,v 1.2 2019/11/10 10:36:01 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Oleksandr Tymoshenko <gonzo%freebsd.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dw_hdmi_phy.c,v 1.1 2019/11/09 23:27:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dw_hdmi_phy.c,v 1.2 2019/11/10 10:36:01 jmcneill Exp $");
 
 #include <sys/param.h>
 
@@ -300,7 +300,7 @@
         * PLL/MPLL config
         */
        for (mpll_conf = &sc->sc_mpll_config[0]; mpll_conf->pixel_clock != 0; mpll_conf++)
-               if (mpll_conf->pixel_clock <= mode->clock)
+               if (mode->clock <= mpll_conf->pixel_clock)
                        break;
 
        dwhdmi_phy_i2c_write(sc, mpll_conf->cpce, HDMI_PHY_I2C_CPCE_CTRL);
@@ -308,7 +308,7 @@
        dwhdmi_phy_i2c_write(sc, mpll_conf->curr, HDMI_PHY_I2C_CURRCTRL);
 
        for (phy_conf = &sc->sc_phy_config[0]; phy_conf->pixel_clock != 0; phy_conf++)
-               if (phy_conf->pixel_clock <= mode->clock)
+               if (mode->clock <= phy_conf->pixel_clock)
                        break;
 
        dwhdmi_phy_i2c_write(sc, 0x0000, HDMI_PHY_I2C_PLLPHBYCTRL);



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