[src/trunk]: src/sys/arch/arm/sunxi Add SPI clocks

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/bcaf0b360210
branches:  trunk
changeset: 461172:bcaf0b360210
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Nov 17 19:51:12 2019 +0000

description:
Add SPI clocks

diffstat:

 sys/arch/arm/sunxi/sun50i_a64_ccu.c |  32 ++++++++++++++++++++++++++++++--
 1 files changed, 30 insertions(+), 2 deletions(-)

diffs (74 lines):

diff -r 30c1939e5c26 -r bcaf0b360210 sys/arch/arm/sunxi/sun50i_a64_ccu.c
--- a/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Sun Nov 17 19:30:59 2019 +0000
+++ b/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Sun Nov 17 19:51:12 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.14 2019/11/17 17:33:17 jmcneill Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.15 2019/11/17 19:51:12 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.14 2019/11/17 17:33:17 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.15 2019/11/17 19:51:12 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -60,6 +60,8 @@
 #define        SDMMC0_CLK_REG          0x088
 #define        SDMMC1_CLK_REG          0x08c
 #define        SDMMC2_CLK_REG          0x090
+#define        SPI0_CLK_REG            0x0a0
+#define        SPI1_CLK_REG            0x0a4
 #define        I2SPCM0_CLK_REG         0x0b0
 #define        I2SPCM1_CLK_REG         0x0b4
 #define        I2SPCM2_CLK_REG         0x0b8
@@ -158,6 +160,7 @@
 static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
 static const char *hdmi_parents[] = { "pll_video0", "pll_video1" };
 static const char *i2s_parents[] = { "pll_audio_8x", "pll_audio_4x", "pll_audio_2x", "pll_audio" };
+static const char *spi_parents[] = { "hosc", "pll_periph0", "pll_periph1", NULL };
 static const char *tcon1_parents[] = { "pll_video0", NULL, "pll_video1", NULL };
 static const char *gpu_parents[] = { "pll_gpu" };
 
@@ -260,6 +263,16 @@
            SUNXI_CCU_NKMP_DIVIDE_BY_TWO),
        SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_PERIPH0_2X, "pll_periph0_2x", "pll_periph0", 1, 2),
 
+       SUNXI_CCU_NKMP(A64_CLK_PLL_PERIPH1, "pll_periph1", "hosc",
+           PLL_PERIPH1_CTRL_REG,       /* reg */
+           __BITS(12,8),               /* n */
+           __BITS(5,4),                /* k */
+           0,                          /* m */
+           __BITS(17,16),              /* p */
+           __BIT(31),                  /* enable */
+           SUNXI_CCU_NKMP_DIVIDE_BY_TWO),
+       SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_PERIPH1_2X, "pll_periph1_2x", "pll_periph1", 1, 2),
+
        SUNXI_CCU_NKMP_TABLE(A64_CLK_PLL_AUDIO_BASE, "pll_audio_base", "hosc",
            PLL_AUDIO_CTRL_REG,         /* reg */
            __BITS(14,8),               /* n */
@@ -430,6 +443,21 @@
            __BIT(31),          /* enable */
            0),
 
+       SUNXI_CCU_NM(A64_CLK_SPI0, "spi0", spi_parents,
+           SPI0_CLK_REG,       /* reg */
+           __BITS(17,16),      /* n */
+           __BITS(3,0),        /* m */
+           __BITS(25,24),      /* sel */
+           __BIT(31),          /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+
+       SUNXI_CCU_NM(A64_CLK_SPI1, "spi1", spi_parents,
+           SPI1_CLK_REG,       /* reg */
+           __BITS(17,16),      /* n */
+           __BITS(3,0),        /* m */
+           __BITS(25,24),      /* sel */
+           __BIT(31),          /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 
        SUNXI_CCU_DIV_GATE(A64_CLK_TCON1, "tcon1", tcon1_parents,
            TCON1_CLK_REG,      /* reg */