[src/trunk]: src/sys/arch/arm/sunxi Set video PLLs to 297MHz

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/73662b7e7e7f
branches:  trunk
changeset: 461353:73662b7e7e7f
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Nov 23 22:46:53 2019 +0000

description:
Set video PLLs to 297MHz

diffstat:

 sys/arch/arm/sunxi/sun50i_a64_ccu.c |  12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)

diffs (35 lines):

diff -r 2ae929b736bd -r 73662b7e7e7f sys/arch/arm/sunxi/sun50i_a64_ccu.c
--- a/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Sat Nov 23 22:35:08 2019 +0000
+++ b/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Sat Nov 23 22:46:53 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.18 2019/11/23 18:57:36 jmcneill Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.19 2019/11/23 22:46:53 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.18 2019/11/23 18:57:36 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.19 2019/11/23 22:46:53 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -622,9 +622,15 @@
        clk_set_parent(&sc->sc_clks[A64_CLK_DE].base, &sc->sc_clks[A64_CLK_PLL_DE].base);
        clk_set_rate(&sc->sc_clks[A64_CLK_PLL_DE].base, 420000000);
 
+       /* Set video PLLs to 297 MHz */
+       clk_set_rate(&sc->sc_clks[A64_CLK_PLL_VIDEO0].base, 297000000);
+       clk_set_rate(&sc->sc_clks[A64_CLK_PLL_VIDEO1].base, 297000000);
+
        /* Set TCON1 parent to PLL_VIDEO1(1X) */
        clk_set_parent(&sc->sc_clks[A64_CLK_TCON1].base, &sc->sc_clks[A64_CLK_PLL_VIDEO1].base);
-       clk_set_rate(&sc->sc_clks[A64_CLK_PLL_VIDEO1].base, 297000000);
+
+       /* Set HDMI parent to PLL_VIDEO1(1X) */
+       clk_set_parent(&sc->sc_clks[A64_CLK_HDMI].base, &sc->sc_clks[A64_CLK_PLL_VIDEO1].base);
 
        sunxi_ccu_print(sc);
 }