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[src/trunk]: src/sys Add SDHC flags.
details: https://anonhg.NetBSD.org/src/rev/0728cf68de0e
branches: trunk
changeset: 464788:0728cf68de0e
user: hkenken <hkenken%NetBSD.org@localhost>
date: Wed Oct 23 05:20:52 2019 +0000
description:
Add SDHC flags.
+ SDHC_FLAG_BROKEN_ADMA2_ZEROLEN
Broken ADMA2 Zero length descriptor.
Can't 64K Byte data transfer.
+ SDHC_FLAG_NO_1_8_V
Support no 1.8V Supply.
Disable UHS-I bus speed mode (SDR50, DDR50, SDR104).
diffstat:
sys/arch/arm/imx/fdt/imx6_sdhc.c | 9 ++++--
sys/dev/sdmmc/sdhc.c | 49 +++++++++++++++++++++------------------
sys/dev/sdmmc/sdhcreg.h | 4 ++-
sys/dev/sdmmc/sdhcvar.h | 7 ++++-
sys/dev/sdmmc/sdmmc.c | 7 +++--
sys/dev/sdmmc/sdmmcchip.h | 3 +-
sys/dev/sdmmc/sdmmcvar.h | 4 ++-
7 files changed, 50 insertions(+), 33 deletions(-)
diffs (229 lines):
diff -r a6ef94a13480 -r 0728cf68de0e sys/arch/arm/imx/fdt/imx6_sdhc.c
--- a/sys/arch/arm/imx/fdt/imx6_sdhc.c Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/arch/arm/imx/fdt/imx6_sdhc.c Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_sdhc.c,v 1.3 2019/09/27 02:54:57 hkenken Exp $ */
+/* $NetBSD: imx6_sdhc.c,v 1.4 2019/10/23 05:20:52 hkenken Exp $ */
/*-
* Copyright (c) 2019 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_sdhc.c,v 1.3 2019/09/27 02:54:57 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_sdhc.c,v 1.4 2019/10/23 05:20:52 hkenken Exp $");
#include "opt_fdt.h"
@@ -120,10 +120,13 @@
SDHC_FLAG_32BIT_ACCESS |
SDHC_FLAG_USE_ADMA2 |
SDHC_FLAG_USDHC |
- SDHC_FLAG_NO_BUSY_INTR;
+ SDHC_FLAG_NO_BUSY_INTR |
+ SDHC_FLAG_BROKEN_ADMA2_ZEROLEN;
if (bus_width == 8)
sc->sc_sdhc.sc_flags |= SDHC_FLAG_8BIT_MODE;
+ if (of_hasprop(faa->faa_phandle, "no-1-8-v"))
+ sc->sc_sdhc.sc_flags |= SDHC_FLAG_NO_1_8_V;
sc->sc_sdhc.sc_host = &sc->sc_host;
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdhc.c
--- a/sys/dev/sdmmc/sdhc.c Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdhc.c Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.103 2019/07/03 23:10:08 jmcneill Exp $ */
+/* $NetBSD: sdhc.c,v 1.104 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.103 2019/07/03 23:10:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.104 2019/10/23 05:20:52 hkenken Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -476,21 +476,23 @@
SET(hp->ocr, MMC_OCR_HCS);
aprint_normal(" HS");
}
- if (ISSET(caps2, SDHC_SDR50_SUPP)) {
- SET(hp->ocr, MMC_OCR_S18A);
- aprint_normal(" SDR50");
- }
- if (ISSET(caps2, SDHC_DDR50_SUPP)) {
- SET(hp->ocr, MMC_OCR_S18A);
- aprint_normal(" DDR50");
- }
- if (ISSET(caps2, SDHC_SDR104_SUPP)) {
- SET(hp->ocr, MMC_OCR_S18A);
- aprint_normal(" SDR104 HS200");
- }
- if (ISSET(caps, SDHC_VOLTAGE_SUPP_1_8V)) {
- SET(hp->ocr, MMC_OCR_1_65V_1_95V);
- aprint_normal(" 1.8V");
+ if (!ISSET(hp->sc->sc_flags, SDHC_FLAG_NO_1_8_V)) {
+ if (ISSET(caps2, SDHC_SDR50_SUPP)) {
+ SET(hp->ocr, MMC_OCR_S18A);
+ aprint_normal(" SDR50");
+ }
+ if (ISSET(caps2, SDHC_DDR50_SUPP)) {
+ SET(hp->ocr, MMC_OCR_S18A);
+ aprint_normal(" DDR50");
+ }
+ if (ISSET(caps2, SDHC_SDR104_SUPP)) {
+ SET(hp->ocr, MMC_OCR_S18A);
+ aprint_normal(" SDR104 HS200");
+ }
+ if (ISSET(caps, SDHC_VOLTAGE_SUPP_1_8V)) {
+ SET(hp->ocr, MMC_OCR_1_65V_1_95V);
+ aprint_normal(" 1.8V");
+ }
}
if (ISSET(caps, SDHC_VOLTAGE_SUPP_3_0V)) {
SET(hp->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
@@ -620,6 +622,10 @@
saa.saa_caps |= SMC_CAPS_SINGLE_ONLY;
if (ISSET(sc->sc_flags, SDHC_FLAG_POLL_CARD_DET))
saa.saa_caps |= SMC_CAPS_POLL_CARD_DET;
+
+ if (ISSET(sc->sc_flags, SDHC_FLAG_BROKEN_ADMA2_ZEROLEN))
+ saa.saa_max_seg = 65535;
+
hp->sdmmc = config_found(sc->sc_dev, &saa, sdhc_cfprint);
return 0;
@@ -1818,12 +1824,9 @@
if (ISSET(hp->sc->sc_flags, SDHC_FLAG_USDHC)) {
/* mode bits is in MIX_CTRL register on uSDHC */
HWRITE4(hp, SDHC_MIX_CTRL, mode |
- (HREAD4(hp, SDHC_MIX_CTRL) &
- ~(SDHC_MULTI_BLOCK_MODE |
- SDHC_READ_MODE |
- SDHC_AUTO_CMD12_ENABLE |
- SDHC_BLOCK_COUNT_ENABLE |
- SDHC_DMA_ENABLE)));
+ (HREAD4(hp, SDHC_MIX_CTRL) & ~SDHC_TRANSFER_MODE_MASK));
+ if (cmd->c_opcode == MMC_STOP_TRANSMISSION)
+ command |= SDHC_COMMAND_TYPE_ABORT;
HWRITE4(hp, SDHC_TRANSFER_MODE, command << 16);
} else {
HWRITE4(hp, SDHC_TRANSFER_MODE, mode | (command << 16));
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdhcreg.h
--- a/sys/dev/sdmmc/sdhcreg.h Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdhcreg.h Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcreg.h,v 1.19 2017/06/23 08:43:59 ryo Exp $ */
+/* $NetBSD: sdhcreg.h,v 1.20 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdhcreg.h,v 1.4 2006/07/30 17:20:40 fgsch Exp $ */
/*
@@ -29,6 +29,7 @@
#define SDHC_BLOCK_COUNT_MAX 512
#define SDHC_ARGUMENT 0x08
#define SDHC_TRANSFER_MODE 0x0c
+#define SDHC_TRANSFER_MODE_MASK 0xb7
#define SDHC_MULTI_BLOCK_MODE (1<<5)
#define SDHC_READ_MODE (1<<4)
#define SDHC_AUTO_CMD12_ENABLE (1<<2)
@@ -228,6 +229,7 @@
#define SDHC_DMA_CTL 0x40c /* eSDHC */
#define SDHC_DMA_SNOOP 0x40
#define SDHC_MIX_CTRL 0x48 /* uSDHC */
+#define SDHC_USDHC_NIBBLE_POS (1<<6)
#define SDHC_USDHC_DDR_EN (1<<3)
#define SDHC_VEND_SPEC 0xc0 /* uSDHC */
#define SDHC_VEND_SPEC_MBO (1<<29)
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdhcvar.h
--- a/sys/dev/sdmmc/sdhcvar.h Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdhcvar.h Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.30 2019/03/13 12:16:49 jmcneill Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.31 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -62,6 +62,11 @@
#define SDHC_FLAG_NO_AUTO_STOP 0x01000000 /* No auto CMD12 */
#define SDHC_FLAG_NO_BUSY_INTR 0x02000000 /* No intr when RESP_BUSY */
#define SDHC_FLAG_STOP_WITH_TC 0x04000000 /* CMD12 can set xfer complete w/o SCF_RSP_BSY */
+#define SDHC_FLAG_BROKEN_ADMA2_ZEROLEN 0x08000000 /*
+ * Broken ADMA2 zero length descriptor
+ * Can't 64K Byte data transfer
+ */
+#define SDHC_FLAG_NO_1_8_V 0x10000000 /* No 1.8V supply */
uint32_t sc_clkbase;
int sc_clkmsk; /* Mask for SDCLK */
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdmmc.c
--- a/sys/dev/sdmmc/sdmmc.c Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdmmc.c Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdmmc.c,v 1.37 2019/09/01 05:45:42 mlelstv Exp $ */
+/* $NetBSD: sdmmc.c,v 1.38 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdmmc.c,v 1.18 2009/01/09 10:58:38 jsg Exp $ */
/*
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdmmc.c,v 1.37 2019/09/01 05:45:42 mlelstv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdmmc.c,v 1.38 2019/10/23 05:20:52 hkenken Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -130,10 +130,11 @@
sc->sc_busclk = sc->sc_clkmax;
sc->sc_buswidth = 1;
sc->sc_caps = saa->saa_caps;
+ sc->sc_max_seg = saa->saa_max_seg ? saa->saa_max_seg : MAXPHYS;
if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) {
error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, SDMMC_MAXNSEGS,
- MAXPHYS, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &sc->sc_dmap);
+ sc->sc_max_seg, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &sc->sc_dmap);
if (error) {
aprint_error_dev(sc->sc_dev,
"couldn't create dma map. (error=%d)\n", error);
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdmmcchip.h
--- a/sys/dev/sdmmc/sdmmcchip.h Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdmmcchip.h Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdmmcchip.h,v 1.9 2017/02/17 10:51:48 nonaka Exp $ */
+/* $NetBSD: sdmmcchip.h,v 1.10 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdmmcchip.h,v 1.3 2007/05/31 10:09:01 uwe Exp $ */
/*
@@ -137,6 +137,7 @@
u_int saa_clkmin;
u_int saa_clkmax;
uint32_t saa_caps; /* see sdmmc_softc.sc_caps */
+ uint32_t saa_max_seg;
};
void sdmmc_needs_discover(device_t);
diff -r a6ef94a13480 -r 0728cf68de0e sys/dev/sdmmc/sdmmcvar.h
--- a/sys/dev/sdmmc/sdmmcvar.h Wed Oct 23 02:34:43 2019 +0000
+++ b/sys/dev/sdmmc/sdmmcvar.h Wed Oct 23 05:20:52 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdmmcvar.h,v 1.31 2019/09/01 05:45:42 mlelstv Exp $ */
+/* $NetBSD: sdmmcvar.h,v 1.32 2019/10/23 05:20:52 hkenken Exp $ */
/* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */
/*
@@ -291,6 +291,8 @@
struct evcnt sc_ev_xfer_aligned[8]; /* aligned xfer counts */
struct evcnt sc_ev_xfer_unaligned; /* unaligned xfer count */
struct evcnt sc_ev_xfer_error; /* error xfer count */
+
+ uint32_t sc_max_seg; /* maximum segment size */
};
/*
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