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[src/netbsd-8]: src/sys/dev/pci Pull up following revision(s) (requested by m...
details: https://anonhg.NetBSD.org/src/rev/efe766aab290
branches: netbsd-8
changeset: 465854:efe766aab290
user: bouyer <bouyer%NetBSD.org@localhost>
date: Thu Dec 05 16:44:32 2019 +0000
description:
Pull up following revision(s) (requested by msaitoh in ticket #1462):
sys/dev/pci/if_bge.c: revision 1.340
sys/dev/pci/if_bge.c: revision 1.341
sys/dev/pci/if_bge.c: revision 1.336
- Avoid undefined behavior in bge_setmulti(). found by kUBSan.
- Avoid undefined behavior when setting the MAC address in bge_init().
found by kUBSan.
Fix a bug that SK-9D41 can't detect fiber media. Check the subsystem ID
correctly. This bug was added in if_bge.c rev. 1.161.
- Use *_FLUSH() more. The main purpose is to wait following delay() correctly.
- Add missing DELAY(80) after writing BGE_MI_MODE register.
diffstat:
sys/dev/pci/if_bge.c | 28 +++++++++++++++-------------
1 files changed, 15 insertions(+), 13 deletions(-)
diffs (111 lines):
diff -r 0136f8905fa1 -r efe766aab290 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c Tue Nov 26 09:00:55 2019 +0000
+++ b/sys/dev/pci/if_bge.c Thu Dec 05 16:44:32 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.310.2.7 2019/05/13 12:40:13 martin Exp $ */
+/* $NetBSD: if_bge.c,v 1.310.2.8 2019/12/05 16:44:32 bouyer Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.310.2.7 2019/05/13 12:40:13 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.310.2.8 2019/12/05 16:44:32 bouyer Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1030,10 +1030,10 @@
* Enable use of auto EEPROM access so we can avoid
* having to use the bitbang method.
*/
- BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
+ BGE_SETBIT_FLUSH(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
/* Reset the EEPROM, load the clock period. */
- CSR_WRITE_4(sc, BGE_EE_ADDR,
+ CSR_WRITE_4_FLUSH(sc, BGE_EE_ADDR,
BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
DELAY(20);
@@ -1825,7 +1825,7 @@
/* Just want the 7 least-significant bits. */
h &= 0x7f;
- hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F);
+ hashes[(h & 0x60) >> 5] |= 1U << (h & 0x1F);
ETHER_NEXT_MULTI(step, enm);
}
@@ -2283,7 +2283,7 @@
#endif
/* Set the timer prescaler (always 66MHz) */
- CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
+ CSR_WRITE_4_FLUSH(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
DELAY(40); /* XXX */
@@ -3439,6 +3439,7 @@
else
mimode |= BGE_MIMODE_BASE;
CSR_WRITE_4(sc, BGE_MI_MODE, mimode);
+ DELAY(80);
/*
* When using the BCM5701 in PCI-X mode, data corruption has
@@ -3638,10 +3639,10 @@
* Reset NVRAM before bge_reset(). It's required to acquire NVRAM
* lock in bge_reset().
*/
- CSR_WRITE_4(sc, BGE_EE_ADDR,
+ CSR_WRITE_4_FLUSH(sc, BGE_EE_ADDR,
BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
delay(1000);
- BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
+ BGE_SETBIT_FLUSH(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
bge_stop_fw(sc);
bge_sig_pre_reset(sc, BGE_RESET_START);
@@ -3854,7 +3855,7 @@
* by its PCI subsystem ID, as we do below for the SysKonnect SK-9D41.
* The SysKonnect SK-9D41 is a 1000baseSX card.
*/
- if (PCI_PRODUCT(pa->pa_id) == SK_SUBSYSID_9D41 ||
+ if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
(hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
if (BGE_IS_5705_PLUS(sc)) {
sc->bge_flags |= BGEF_FIBER_MII;
@@ -5534,7 +5535,8 @@
/* Load our MAC address. */
m = (const uint16_t *)&(CLLADDR(ifp->if_sadl)[0]);
CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
- CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2]));
+ CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI,
+ ((uint32_t)htons(m[1]) << 16) | htons(m[2]));
/* Enable or disable promiscuous mode as needed. */
if (ifp->if_flags & IFF_PROMISC)
@@ -5680,10 +5682,10 @@
break;
case IFM_1000_SX:
if ((ifm->ifm_media & IFM_FDX) != 0) {
- BGE_CLRBIT(sc, BGE_MAC_MODE,
+ BGE_CLRBIT_FLUSH(sc, BGE_MAC_MODE,
BGE_MACMODE_HALF_DUPLEX);
} else {
- BGE_SETBIT(sc, BGE_MAC_MODE,
+ BGE_SETBIT_FLUSH(sc, BGE_MAC_MODE,
BGE_MACMODE_HALF_DUPLEX);
}
DELAY(40);
@@ -6081,7 +6083,7 @@
BGE_STS_SETBIT(sc, BGE_STS_LINK);
if (BGE_ASICREV(sc->bge_chipid)
== BGE_ASICREV_BCM5704) {
- BGE_CLRBIT(sc, BGE_MAC_MODE,
+ BGE_CLRBIT_FLUSH(sc, BGE_MAC_MODE,
BGE_MACMODE_TBI_SEND_CFGS);
DELAY(40);
}
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