Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev s/enalbe/enable/
details: https://anonhg.NetBSD.org/src/rev/7d47e2a4b6e7
branches: trunk
changeset: 466075:7d47e2a4b6e7
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Dec 11 07:33:55 2019 +0000
description:
s/enalbe/enable/
diffstat:
sys/dev/mii/ikphyreg.h | 4 ++--
sys/dev/mii/inbmphyreg.h | 4 ++--
sys/dev/pci/pci_subr.c | 6 +++---
sys/dev/pci/pcireg.h | 4 ++--
4 files changed, 9 insertions(+), 9 deletions(-)
diffs (81 lines):
diff -r 05e1379f89bb -r 7d47e2a4b6e7 sys/dev/mii/ikphyreg.h
--- a/sys/dev/mii/ikphyreg.h Wed Dec 11 05:50:03 2019 +0000
+++ b/sys/dev/mii/ikphyreg.h Wed Dec 11 07:33:55 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ikphyreg.h,v 1.3 2016/10/28 05:50:18 msaitoh Exp $ */
+/* $NetBSD: ikphyreg.h,v 1.4 2019/12/11 07:33:55 msaitoh Exp $ */
/*******************************************************************************
Copyright (c) 2001-2005, Intel Corporation
All rights reserved.
@@ -57,7 +57,7 @@
#define GG82563_PSCR_CROSSOVER_MODE_MDI 0x0000 /* 00=Manual MDI configuration */
#define GG82563_PSCR_CROSSOVER_MODE_MDIX 0x0020 /* 01=Manual MDIX configuration */
#define GG82563_PSCR_CROSSOVER_MODE_AUTO 0x0060 /* 11=Automatic crossover */
-#define GG82563_PSCR_ENALBE_EXTENDED_DISTANCE 0x0080 /* 1=Enable Extended Distance */
+#define GG82563_PSCR_ENABLE_EXTENDED_DISTANCE 0x0080 /* 1=Enable Extended Distance */
#define GG82563_PSCR_ENERGY_DETECT_MASK 0x0300
#define GG82563_PSCR_ENERGY_DETECT_OFF 0x0000 /* 00,01=Off */
#define GG82563_PSCR_ENERGY_DETECT_RX 0x0200 /* 10=Sense on Rx only (Energy Detect) */
diff -r 05e1379f89bb -r 7d47e2a4b6e7 sys/dev/mii/inbmphyreg.h
--- a/sys/dev/mii/inbmphyreg.h Wed Dec 11 05:50:03 2019 +0000
+++ b/sys/dev/mii/inbmphyreg.h Wed Dec 11 07:33:55 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: inbmphyreg.h,v 1.18 2019/01/31 15:30:23 msaitoh Exp $ */
+/* $NetBSD: inbmphyreg.h,v 1.19 2019/12/11 07:33:55 msaitoh Exp $ */
/*******************************************************************************
Copyright (c) 2001-2015, Intel Corporation
All rights reserved.
@@ -68,7 +68,7 @@
#define BME1000_PSCR_CROSSOVER_MODE_MDI 0x0000 /* 00=Manual MDI configuration */
#define BME1000_PSCR_CROSSOVER_MODE_MDIX 0x0020 /* 01=Manual MDIX configuration */
#define BME1000_PSCR_CROSSOVER_MODE_AUTO 0x0060 /* 11=Automatic crossover */
-#define BME1000_PSCR_ENALBE_EXTENDED_DISTANCE 0x0080 /* 1=Enable Extended Distance */
+#define BME1000_PSCR_ENABLE_EXTENDED_DISTANCE 0x0080 /* 1=Enable Extended Distance */
#define BME1000_PSCR_ENERGY_DETECT_MASK 0x0300
#define BME1000_PSCR_ENERGY_DETECT_OFF 0x0000 /* 00,01=Off */
#define BME1000_PSCR_ENERGY_DETECT_RX 0x0200 /* 10=Sense on Rx only (Energy Detect) */
diff -r 05e1379f89bb -r 7d47e2a4b6e7 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c Wed Dec 11 05:50:03 2019 +0000
+++ b/sys/dev/pci/pci_subr.c Wed Dec 11 07:33:55 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.217 2019/09/20 10:04:45 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.218 2019/12/11 07:33:55 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.217 2019/09/20 10:04:45 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.218 2019/12/11 07:33:55 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -3531,7 +3531,7 @@
ctl = reg & 0xffff;
sta = reg >> 16;
printf(" Control Register: 0x%04x\n", ctl);
- onoff("Enalbe", reg, PCI_PAGE_REQ_CTL_E);
+ onoff("Enable", reg, PCI_PAGE_REQ_CTL_E);
onoff("Reset", reg, PCI_PAGE_REQ_CTL_R);
printf(" Status Register: 0x%04x\n", sta);
diff -r 05e1379f89bb -r 7d47e2a4b6e7 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Wed Dec 11 05:50:03 2019 +0000
+++ b/sys/dev/pci/pcireg.h Wed Dec 11 07:33:55 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.147 2019/03/01 09:26:00 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.148 2019/12/11 07:33:55 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -1886,7 +1886,7 @@
* Page Request
*/
#define PCI_PAGE_REQ_CTL 0x04 /* Control Register */
-#define PCI_PAGE_REQ_CTL_E __BIT(0) /* Enalbe */
+#define PCI_PAGE_REQ_CTL_E __BIT(0) /* Enable */
#define PCI_PAGE_REQ_CTL_R __BIT(1) /* Reset */
#define PCI_PAGE_REQ_STA 0x04 /* Status Register */
#define PCI_PAGE_REQ_STA_RF __BIT(0+16) /* Response Failure */
Home |
Main Index |
Thread Index |
Old Index