[src/netbsd-1-4]: src/sys/dev/ic pull up rev 1.14 from trunk (cgd):

[cgd <cgd%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/acd8ed2a9bd2
branches:  netbsd-1-4
changeset: 469405:acd8ed2a9bd2
user:      cgd <cgd%NetBSD.org@localhost>
date:      Sat Sep 18 00:56:24 1999 +0000

description:
pull up rev 1.14 from trunk (cgd):
        Select the right tranceiver type when configuring the driver,
        and change the timing for the MII code a bit.  Fixes a problem
        with MII not being reported correctly (PR#8363).  (cgd)

diffstat:

 sys/dev/ic/elinkxl.c |  66 ++++++++++++++++++++++++++++++++++++++++-----------
 1 files changed, 52 insertions(+), 14 deletions(-)

diffs (138 lines):

diff -r 69cfb3814db2 -r acd8ed2a9bd2 sys/dev/ic/elinkxl.c
--- a/sys/dev/ic/elinkxl.c      Thu Sep 16 03:36:58 1999 +0000
+++ b/sys/dev/ic/elinkxl.c      Sat Sep 18 00:56:24 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: elinkxl.c,v 1.7.2.3 1999/04/28 18:47:25 perry Exp $    */
+/*     $NetBSD: elinkxl.c,v 1.7.2.4 1999/09/18 00:56:24 cgd Exp $      */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -381,7 +381,22 @@
        if (sc->ex_conf & EX_CONF_MII) {
                /*
                 * Find PHY, extract media information from it.
+                * First, select the right transceiver.
                 */
+               u_int32_t icfg;
+
+               GO_WINDOW(3);
+               icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
+               icfg &= ~(CONFIG_XCVR_SEL << 16);
+               if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
+                       icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
+               if (val & ELINK_MEDIACAP_100BASETX)
+                       icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
+               if (val & ELINK_MEDIACAP_100BASEFX)
+                       icfg |= ELINKMEDIA_100BASE_FX 
+                               << (CONFIG_XCVR_SEL_SHIFT + 16);
+               bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
+
                mii_phy_probe(&sc->sc_dev, &sc->ex_mii, 0xffffffff);
                if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
                        ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
@@ -1714,33 +1729,46 @@
 
        bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, 0);
 
-       ex_mii_clrbit(sc, ELINK_PHY_DIR);
+       ex_mii_setbit(sc, ELINK_PHY_DIR);
+       delay(1);
+       ex_mii_setbit(sc, ELINK_PHY_DIR|ELINK_PHY_DATA);
+       delay(1);
+
         for (i = 0; i < 32; i++) {
+                ex_mii_setbit(sc, ELINK_PHY_CLK);
+               delay(1);
                 ex_mii_clrbit(sc, ELINK_PHY_CLK);
-                ex_mii_setbit(sc, ELINK_PHY_CLK);
+               delay(1);
         }
        ex_mii_writebits(sc, MII_COMMAND_START, 2);
        ex_mii_writebits(sc, MII_COMMAND_READ, 2);
        ex_mii_writebits(sc, phy, 5);
        ex_mii_writebits(sc, reg, 5);
 
-       ex_mii_clrbit(sc, ELINK_PHY_DIR);
-       ex_mii_clrbit(sc, ELINK_PHY_CLK);
+       ex_mii_clrbit(sc, ELINK_PHY_DATA|ELINK_PHY_CLK);
+       delay(1);
        ex_mii_setbit(sc, ELINK_PHY_CLK);
-       ex_mii_clrbit(sc, ELINK_PHY_CLK);
+       delay(1);
+       ex_mii_clrbit(sc, ELINK_PHY_DIR|ELINK_PHY_CLK);
+       delay(1);
+       ex_mii_setbit(sc, ELINK_PHY_CLK);
+       delay(1);
 
        err = ex_mii_readbit(sc, ELINK_PHY_DATA);
-       ex_mii_setbit(sc, ELINK_PHY_CLK);
 
        for (i = 0; i < 16; i++) {
                val <<= 1;
                ex_mii_clrbit(sc, ELINK_PHY_CLK);
+               delay(1);
                if (err == 0 && ex_mii_readbit(sc, ELINK_PHY_DATA))
                                val |= 1;
                ex_mii_setbit(sc, ELINK_PHY_CLK);
+               delay(1);
        }
        ex_mii_clrbit(sc, ELINK_PHY_CLK);
+       delay(1);
        ex_mii_setbit(sc, ELINK_PHY_CLK);
+       delay(1);
 
        GO_WINDOW(1);
 
@@ -1756,15 +1784,17 @@
        int i;
 
        ex_mii_setbit(sc, ELINK_PHY_DIR);
+       ex_mii_clrbit(sc, ELINK_PHY_CLK);
+
        for (i = 1 << (nbits -1); i; i = i >>  1) {
-               ex_mii_clrbit(sc, ELINK_PHY_CLK);
-               ex_mii_readbit(sc, ELINK_PHY_CLK);
                if (data & i)
                        ex_mii_setbit(sc, ELINK_PHY_DATA);
                else
                        ex_mii_clrbit(sc, ELINK_PHY_DATA);
+               delay(1);
+               ex_mii_clrbit(sc, ELINK_PHY_CLK);
+               delay(1);
                ex_mii_setbit(sc, ELINK_PHY_CLK);
-               ex_mii_readbit(sc, ELINK_PHY_CLK);
        }
 }
 
@@ -1780,10 +1810,15 @@
 
        GO_WINDOW(4);
 
-       ex_mii_clrbit(sc, ELINK_PHY_DIR);
+       ex_mii_setbit(sc, ELINK_PHY_DIR);
+       delay(1);
+       ex_mii_setbit(sc, ELINK_PHY_DIR|ELINK_PHY_DATA);
+       delay(1);
        for (i = 0; i < 32; i++) {
-               ex_mii_clrbit(sc, ELINK_PHY_CLK);
-               ex_mii_setbit(sc, ELINK_PHY_CLK);
+                ex_mii_setbit(sc, ELINK_PHY_CLK);
+               delay(1);
+                ex_mii_clrbit(sc, ELINK_PHY_CLK);
+               delay(1);
        }
        ex_mii_writebits(sc, MII_COMMAND_START, 2);
        ex_mii_writebits(sc, MII_COMMAND_WRITE, 2);
@@ -1792,8 +1827,11 @@
        ex_mii_writebits(sc, MII_COMMAND_ACK, 2);
        ex_mii_writebits(sc, data, 16);
 
+       ex_mii_setbit(sc, ELINK_PHY_CLK);
+       delay(1);
        ex_mii_clrbit(sc, ELINK_PHY_CLK);
-       ex_mii_setbit(sc, ELINK_PHY_CLK);
+       delay(1);
+       ex_mii_clrbit(sc, ELINK_PHY_DIR);
 
        GO_WINDOW(1);
 }