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[src/trunk]: src/sys/arch/sparc/sparc Argh, removed last ELF induced problem....
details: https://anonhg.NetBSD.org/src/rev/df4c0ea64561
branches: trunk
changeset: 472710:df4c0ea64561
user: christos <christos%NetBSD.org@localhost>
date: Wed May 05 10:53:00 1999 +0000
description:
Argh, removed last ELF induced problem. We used to have syscall: in locore.s
and _C_LABEL(syscall) in trap.c. In ELF they are the same. Change the label
in locore.s to be _C_LABEL(_syscall).
While I am there, move the register save and restoral code used in the
*sigcode trampolines into two macros and use them instead of copying 100
lines of assembly each time.
Now everything ELF works.
diffstat:
sys/arch/sparc/sparc/locore.s | 380 ++++++++++-------------------------------
1 files changed, 94 insertions(+), 286 deletions(-)
diffs (truncated from 453 to 300 lines):
diff -r 5cfe0dda00de -r df4c0ea64561 sys/arch/sparc/sparc/locore.s
--- a/sys/arch/sparc/sparc/locore.s Wed May 05 10:50:02 1999 +0000
+++ b/sys/arch/sparc/sparc/locore.s Wed May 05 10:53:00 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.121 1999/05/04 17:29:22 christos Exp $ */
+/* $NetBSD: locore.s,v 1.122 1999/05/05 10:53:00 christos Exp $ */
/*
* Copyright (c) 1996 Paul Kranenburg
@@ -346,7 +346,7 @@
#endif
/* special high-speed 1-instruction-shaved-off traps (get nothing in %l3) */
-#define SYSCALL b syscall; mov %psr, %l0; nop; nop
+#define SYSCALL b _C_LABEL(_syscall); mov %psr, %l0; nop; nop
#define WINDOW_OF b window_of; mov %psr, %l0; nop; nop
#define WINDOW_UF b window_uf; mov %psr, %l0; nop; nop
#ifdef notyet
@@ -2322,7 +2322,7 @@
* XXX should not have to save&reload ALL the registers just for
* ptrace...
*/
-syscall:
+_C_LABEL(_syscall):
TRAP_SETUP(-CCFSZ-80)
wr %l0, PSR_ET, %psr
std %l0, [%sp + CCFSZ + 0] ! tf_psr, tf_pc
@@ -2730,7 +2730,7 @@
.globl window_uf, winuf_user, winuf_ok, winuf_invalid
.globl return_from_trap, rft_kernel, rft_user, rft_invalid
.globl softtrap, slowtrap
- .globl clean_trap_window, syscall
+ .globl clean_trap_window, _C_LABEL(_syscall)
#endif
/*
@@ -3984,92 +3984,96 @@
* will eventually be removed, with a hole left in its place, if things
* work out.
*/
+#define SAVE_STATE \
+ /* \
+ * XXX the `save' and `restore' below are unnecessary: should \
+ * replace with simple arithmetic on %sp \
+ * \
+ * Make room on the stack for 32 %f registers + %fsr. This comes \
+ * out to 33*4 or 132 bytes, but this must be aligned to a multiple \
+ * of 8, or 136 bytes. \
+ */ \
+ save %sp, -CCFSZ - 136, %sp; \
+ mov %g2, %l2; /* save globals in %l registers */ \
+ mov %g3, %l3; \
+ mov %g4, %l4; \
+ mov %g5, %l5; \
+ mov %g6, %l6; \
+ mov %g7, %l7; \
+ /* \
+ * Saving the fpu registers is expensive, so do it iff the fsr \
+ * stored in the sigcontext shows that the fpu is enabled. \
+ */ \
+ ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0; \
+ sethi %hi(PSR_EF), %l1; /* FPU enable is too high for andcc */ \
+ andcc %l0, %l1, %l0; /* %l0 = fpu enable bit */ \
+ be 1f; /* if not set, skip the saves */ \
+ rd %y, %l1; /* in any case, save %y */ \
+ /* fpu is enabled, oh well */ \
+ st %fsr, [%sp + CCFSZ + 0]; \
+ std %f0, [%sp + CCFSZ + 8]; \
+ std %f2, [%sp + CCFSZ + 16]; \
+ std %f4, [%sp + CCFSZ + 24]; \
+ std %f6, [%sp + CCFSZ + 32]; \
+ std %f8, [%sp + CCFSZ + 40]; \
+ std %f10, [%sp + CCFSZ + 48]; \
+ std %f12, [%sp + CCFSZ + 56]; \
+ std %f14, [%sp + CCFSZ + 64]; \
+ std %f16, [%sp + CCFSZ + 72]; \
+ std %f18, [%sp + CCFSZ + 80]; \
+ std %f20, [%sp + CCFSZ + 88]; \
+ std %f22, [%sp + CCFSZ + 96]; \
+ std %f24, [%sp + CCFSZ + 104]; \
+ std %f26, [%sp + CCFSZ + 112]; \
+ std %f28, [%sp + CCFSZ + 120]; \
+ std %f30, [%sp + CCFSZ + 128]; \
+1:
+
+#define RESTORE_STATE \
+ /* \
+ * Now that the handler has returned, re-establish all the state \
+ * we just saved above, then do a sigreturn. \
+ */ \
+ tst %l0; /* reload fpu registers? */ \
+ be 1f; /* if not, skip the loads */ \
+ wr %l1, %g0, %y; /* in any case, restore %y */ \
+ ld [%sp + CCFSZ + 0], %fsr; \
+ ldd [%sp + CCFSZ + 8], %f0; \
+ ldd [%sp + CCFSZ + 16], %f2; \
+ ldd [%sp + CCFSZ + 24], %f4; \
+ ldd [%sp + CCFSZ + 32], %f6; \
+ ldd [%sp + CCFSZ + 40], %f8; \
+ ldd [%sp + CCFSZ + 48], %f10; \
+ ldd [%sp + CCFSZ + 56], %f12; \
+ ldd [%sp + CCFSZ + 64], %f14; \
+ ldd [%sp + CCFSZ + 72], %f16; \
+ ldd [%sp + CCFSZ + 80], %f18; \
+ ldd [%sp + CCFSZ + 88], %f20; \
+ ldd [%sp + CCFSZ + 96], %f22; \
+ ldd [%sp + CCFSZ + 104], %f24; \
+ ldd [%sp + CCFSZ + 112], %f26; \
+ ldd [%sp + CCFSZ + 120], %f28; \
+ ldd [%sp + CCFSZ + 128], %f30; \
+1: \
+ mov %l2, %g2; \
+ mov %l3, %g3; \
+ mov %l4, %g4; \
+ mov %l5, %g5; \
+ mov %l6, %g6; \
+ mov %l7, %g7
+
.globl _C_LABEL(sigcode)
.globl _C_LABEL(esigcode)
_C_LABEL(sigcode):
- /*
- * XXX the `save' and `restore' below are unnecessary: should
- * replace with simple arithmetic on %sp
- *
- * Make room on the stack for 32 %f registers + %fsr. This comes
- * out to 33*4 or 132 bytes, but this must be aligned to a multiple
- * of 8, or 136 bytes.
- */
- save %sp, -CCFSZ - 136, %sp
- mov %g2, %l2 ! save globals in %l registers
- mov %g3, %l3
- mov %g4, %l4
- mov %g5, %l5
- mov %g6, %l6
- mov %g7, %l7
- /*
- * Saving the fpu registers is expensive, so do it iff the fsr
- * stored in the sigcontext shows that the fpu is enabled.
- */
- ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0
- sethi %hi(PSR_EF), %l1 ! FPU enable bit is too high for andcc
- andcc %l0, %l1, %l0 ! %l0 = fpu enable bit
- be 1f ! if not set, skip the saves
- rd %y, %l1 ! in any case, save %y
-
- ! fpu is enabled, oh well
- st %fsr, [%sp + CCFSZ + 0]
- std %f0, [%sp + CCFSZ + 8]
- std %f2, [%sp + CCFSZ + 16]
- std %f4, [%sp + CCFSZ + 24]
- std %f6, [%sp + CCFSZ + 32]
- std %f8, [%sp + CCFSZ + 40]
- std %f10, [%sp + CCFSZ + 48]
- std %f12, [%sp + CCFSZ + 56]
- std %f14, [%sp + CCFSZ + 64]
- std %f16, [%sp + CCFSZ + 72]
- std %f18, [%sp + CCFSZ + 80]
- std %f20, [%sp + CCFSZ + 88]
- std %f22, [%sp + CCFSZ + 96]
- std %f24, [%sp + CCFSZ + 104]
- std %f26, [%sp + CCFSZ + 112]
- std %f28, [%sp + CCFSZ + 120]
- std %f30, [%sp + CCFSZ + 128]
-
-1:
+
+ SAVE_STATE
+
ldd [%fp + 64], %o0 ! sig, code
ld [%fp + 76], %o3 ! arg3
call %g1 ! (*sa->sa_handler)(sig,code,scp,arg3)
add %fp, 64 + 16, %o2 ! scp
- /*
- * Now that the handler has returned, re-establish all the state
- * we just saved above, then do a sigreturn.
- */
- tst %l0 ! reload fpu registers?
- be 1f ! if not, skip the loads
- wr %l1, %g0, %y ! in any case, restore %y
-
- ld [%sp + CCFSZ + 0], %fsr
- ldd [%sp + CCFSZ + 8], %f0
- ldd [%sp + CCFSZ + 16], %f2
- ldd [%sp + CCFSZ + 24], %f4
- ldd [%sp + CCFSZ + 32], %f6
- ldd [%sp + CCFSZ + 40], %f8
- ldd [%sp + CCFSZ + 48], %f10
- ldd [%sp + CCFSZ + 56], %f12
- ldd [%sp + CCFSZ + 64], %f14
- ldd [%sp + CCFSZ + 72], %f16
- ldd [%sp + CCFSZ + 80], %f18
- ldd [%sp + CCFSZ + 88], %f20
- ldd [%sp + CCFSZ + 96], %f22
- ldd [%sp + CCFSZ + 104], %f24
- ldd [%sp + CCFSZ + 112], %f26
- ldd [%sp + CCFSZ + 120], %f28
- ldd [%sp + CCFSZ + 128], %f30
-
-1:
- mov %l2, %g2
- mov %l3, %g3
- mov %l4, %g4
- mov %l5, %g5
- mov %l6, %g6
- mov %l7, %g7
+ RESTORE_STATE
! get registers back & set syscall #
restore %g0, SYS___sigreturn14, %g1
@@ -4081,116 +4085,18 @@
_C_LABEL(esigcode):
#ifdef COMPAT_SUNOS
-/*
- * The following code is copied to the top of the user stack when each
- * process is exec'ed, and signals are `trampolined' off it.
- *
- * When this code is run, the stack looks like:
- * [%sp] 64 bytes to which registers can be dumped
- * [%sp + 64] signal number (goes in %o0)
- * [%sp + 64 + 4] signal code (goes in %o1)
- * [%sp + 64 + 8] placeholder
- * [%sp + 64 + 12] argument for %o3, currently unsupported (always 0)
- * [%sp + 64 + 16] first word of saved state (sigcontext)
- * .
- * .
- * .
- * [%sp + NNN] last word of saved state
- * (followed by previous stack contents or top of signal stack).
- * The address of the function to call is in %g1; the old %g1 and %o0
- * have already been saved in the sigcontext. We are running in a clean
- * window, all previous windows now being saved to the stack.
- *
- * Note that [%sp + 64 + 8] == %sp + 64 + 16. The copy at %sp+64+8
- * will eventually be removed, with a hole left in its place, if things
- * work out.
- */
.globl _C_LABEL(sunos_sigcode)
.globl _C_LABEL(sunos_esigcode)
_C_LABEL(sunos_sigcode):
- /*
- * XXX the `save' and `restore' below are unnecessary: should
- * replace with simple arithmetic on %sp
- *
- * Make room on the stack for 32 %f registers + %fsr. This comes
- * out to 33*4 or 132 bytes, but this must be aligned to a multiple
- * of 8, or 136 bytes.
- */
- save %sp, -CCFSZ - 136, %sp
- mov %g2, %l2 ! save globals in %l registers
- mov %g3, %l3
- mov %g4, %l4
- mov %g5, %l5
- mov %g6, %l6
- mov %g7, %l7
- /*
- * Saving the fpu registers is expensive, so do it iff the fsr
- * stored in the sigcontext shows that the fpu is enabled.
- */
- ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0
- sethi %hi(PSR_EF), %l1 ! FPU enable bit is too high for andcc
- andcc %l0, %l1, %l0 ! %l0 = fpu enable bit
- be 1f ! if not set, skip the saves
- rd %y, %l1 ! in any case, save %y
-
- ! fpu is enabled, oh well
- st %fsr, [%sp + CCFSZ + 0]
- std %f0, [%sp + CCFSZ + 8]
- std %f2, [%sp + CCFSZ + 16]
- std %f4, [%sp + CCFSZ + 24]
- std %f6, [%sp + CCFSZ + 32]
- std %f8, [%sp + CCFSZ + 40]
- std %f10, [%sp + CCFSZ + 48]
- std %f12, [%sp + CCFSZ + 56]
- std %f14, [%sp + CCFSZ + 64]
- std %f16, [%sp + CCFSZ + 72]
- std %f18, [%sp + CCFSZ + 80]
- std %f20, [%sp + CCFSZ + 88]
- std %f22, [%sp + CCFSZ + 96]
- std %f24, [%sp + CCFSZ + 104]
- std %f26, [%sp + CCFSZ + 112]
- std %f28, [%sp + CCFSZ + 120]
- std %f30, [%sp + CCFSZ + 128]
-
-1:
+
+ SAVE_STATE
+
ldd [%fp + 64], %o0 ! sig, code
ld [%fp + 76], %o3 ! arg3
call %g1 ! (*sa->sa_handler)(sig,code,scp,arg3)
add %fp, 64 + 16, %o2 ! scp
- /*
- * Now that the handler has returned, re-establish all the state
- * we just saved above, then do a sigreturn.
- */
- tst %l0 ! reload fpu registers?
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