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[src/trunk]: src/gnu/dist/gcc m68k/ELF target configuration.
details: https://anonhg.NetBSD.org/src/rev/ffc67f1b1319
branches: trunk
changeset: 473271:ffc67f1b1319
user: kleink <kleink%NetBSD.org@localhost>
date: Thu May 27 14:37:14 1999 +0000
description:
m68k/ELF target configuration.
diffstat:
gnu/dist/gcc/config/m68k/netbsd-elf.h | 561 ++++++++++++++++++++++++++++++++++
gnu/dist/gcc/configure | 8 +
gnu/dist/gcc/configure.in | 8 +
3 files changed, 577 insertions(+), 0 deletions(-)
diffs (truncated from 601 to 300 lines):
diff -r d7455ce73df6 -r ffc67f1b1319 gnu/dist/gcc/config/m68k/netbsd-elf.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/gnu/dist/gcc/config/m68k/netbsd-elf.h Thu May 27 14:37:14 1999 +0000
@@ -0,0 +1,561 @@
+/* Definitions of target machine for GNU compiler, for m68k NetBSD platforms
+ using the ELF object format.
+ Largely derived from alpha/netbsd.h, i386/netbsd-elf.h and m68k/linux.h.
+ Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#define MOTOROLA /* Use Motorola syntax */
+#define USE_GAS /* But GAS wants jbsr instead of jsr */
+
+/* Get generic m68k definitions. */
+
+#include <m68k/m68k.h>
+
+/* Get generic NetBSD ELF definitions. We will override if necessary. */
+
+#define NETBSD_ELF
+#include <netbsd.h>
+
+/* 68020 with 68881 */
+#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
+
+#define bsd4_4
+#undef HAS_INIT_SECTION
+
+#undef CPP_SPEC
+#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__} %{posix:-D_POSIX_SOURCE}"
+
+#undef ASM_SPEC
+#define ASM_SPEC " %| %{m68030} %{m68040} %{m68060} %{fpic:-k} %{fPIC:-k -K}"
+
+/* Provide a set of pre-definitions and pre-assertions appropriate for
+ the m68k running svr4. */
+
+/* NetBSD extension to GNU C: __KPRINTF_ATTRIBUTE__ */
+
+#define CPP_PREDEFINES "\
+-Dm68k -D__NetBSD__ -D__ELF__ -D__KPRINTF_ATTRIBUTE__ -D__SVR4_ABI__ \
+-D__motorola__ -Asystem(unix) -Asystem(NetBSD) -Acpu(m68k) -Amachine(m68k)"
+
+/* XXX This may need further investigation. */
+
+#undef DBX_DEBUGGING_INFO
+#define DBX_DEBUGGING_INFO
+#undef PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+
+/* Make GCC agree with <machine/ansi.h>. */
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "int"
+
+#undef WCHAR_UNSIGNED
+#define WCHAR_UNSIGNED 0
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE 32
+
+#undef ASM_APP_ON
+#define ASM_APP_ON "#APP\n"
+
+#undef ASM_APP_OFF
+#define ASM_APP_OFF "#NO_APP\n"
+
+/* Here are four prefixes that are used by asm_fprintf to
+ facilitate customization for alternate assembler syntaxes.
+ Machines with no likelihood of an alternate syntax need not
+ define these and need not use asm_fprintf. */
+
+/* The prefix for register names. Note that REGISTER_NAMES
+ is supposed to include this prefix. Also note that this is NOT an
+ fprintf format string, it is a literal string */
+
+#undef REGISTER_PREFIX
+#define REGISTER_PREFIX "%"
+
+/* The prefix for local (compiler generated) labels.
+ These labels will not appear in the symbol table. */
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* The prefix to add to user-visible assembler symbols. */
+
+#undef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX ""
+
+#define ASM_COMMENT_START "|"
+
+/* How to refer to registers in assembler output.
+ This sequence is indexed by compiler's hard-register-number.
+ Motorola format uses different register names than defined in m68k.h.
+ We also take this chance to convert 'a6' to 'fp' */
+
+#undef REGISTER_NAMES
+
+#ifndef SUPPORT_SUN_FPA
+
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
+ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
+
+#else /* SUPPORTED_SUN_FPA */
+
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
+ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \
+ "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \
+ "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \
+ "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \
+ "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
+
+#endif /* defined SUPPORT_SUN_FPA */
+
+/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
+ keep switch tables in the text section. */
+
+#define JUMP_TABLES_IN_TEXT_SECTION 1
+
+/* Use the default action for outputting the case label. */
+#undef ASM_OUTPUT_CASE_LABEL
+#define ASM_RETURN_CASE_JUMP \
+ do { \
+ if (TARGET_5200) \
+ return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
+ else \
+ return "jmp %%pc@(2,%0:w)"; \
+ } while (0)
+
+/* This is how to output an assembler line that says to advance the
+ location counter to a multiple of 2**LOG bytes. */
+
+#undef ALIGN_ASM_OP
+#define ALIGN_ASM_OP ".align"
+
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG) \
+do { \
+ if ((LOG) > 0) \
+ fprintf ((FILE), "\t%s %u\n", ALIGN_ASM_OP, 1 << (LOG)); \
+} while (0)
+
+/* If defined, a C expression whose value is a string containing the
+ assembler operation to identify the following data as uninitialized global
+ data. */
+
+#define BSS_SECTION_ASM_OP ".section\t.bss"
+
+/* A C statement (sans semicolon) to output to the stdio stream
+ FILE the assembler definition of uninitialized global DECL named
+ NAME whose size is SIZE bytes and alignment is ALIGN bytes.
+ Try to use asm_output_aligned_bss to implement this macro. */
+
+#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
+ asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
+
+/* Section output setup. */
+
+#define USE_CONST_SECTION 1
+
+#define BSS_SECTION_ASM_OP ".section\t.bss"
+#define CONST_SECTION_ASM_OP ".section\t.rodata"
+#define CTORS_SECTION_ASM_OP ".section\t.ctors,\"aw\""
+#define DTORS_SECTION_ASM_OP ".section\t.dtors,\"aw\""
+#define INIT_SECTION_ASM_OP ".section\t.init"
+#define FINI_SECTION_ASM_OP ".section\t.fini"
+
+#undef EXTRA_SECTIONS
+#define EXTRA_SECTIONS in_const, in_ctors, in_dtors
+
+#undef EXTRA_SECTION_FUNCTIONS
+#define EXTRA_SECTION_FUNCTIONS \
+ CONST_SECTION_FUNCTION \
+ CTORS_SECTION_FUNCTION \
+ DTORS_SECTION_FUNCTION
+
+#undef READONLY_DATA_SECTION
+#define READONLY_DATA_SECTION() const_section ()
+
+extern void text_section ();
+
+#define CONST_SECTION_FUNCTION \
+void \
+const_section () \
+{ \
+ if (!USE_CONST_SECTION) \
+ text_section(); \
+ else if (in_section != in_const) \
+ { \
+ fprintf (asm_out_file, "%s\n", CONST_SECTION_ASM_OP); \
+ in_section = in_const; \
+ } \
+}
+
+#define CTORS_SECTION_FUNCTION \
+void \
+ctors_section () \
+{ \
+ if (in_section != in_ctors) \
+ { \
+ fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
+ in_section = in_ctors; \
+ } \
+}
+
+#define DTORS_SECTION_FUNCTION \
+void \
+dtors_section () \
+{ \
+ if (in_section != in_dtors) \
+ { \
+ fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
+ in_section = in_dtors; \
+ } \
+}
+
+/* Switch into a generic section.
+ This is currently only used to support section attributes.
+
+ We make the section read-only and executable for a function decl,
+ read-only for a const data decl, and writable for a non-const data decl. */
+#define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME, RELOC) \
+ fprintf (FILE, ".section\t%s,\"%s\",@progbits\n", NAME, \
+ (DECL) && TREE_CODE (DECL) == FUNCTION_DECL ? "ax" : \
+ (DECL) && DECL_READONLY_SECTION (DECL, RELOC) ? "a" : "aw")
+
+/* These macros generate the special .type and .size directives which
+ are used to set the corresponding fields of the linker symbol table
+ entries in an ELF object file under SVR4. These macros also output
+ the starting labels for the relevant functions/objects. */
+
+/* Write the extra assembler code needed to declare a function properly.
+ Some svr4 assemblers need to also have something extra said about the
+ function's return value. We allow for that here. */
+
+#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
+ do { \
+ fprintf (FILE, "\t%s\t", TYPE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
+ putc ('\n', FILE); \
+ ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
+ ASM_OUTPUT_LABEL(FILE, NAME); \
+ } while (0)
+
+/* Write the extra assembler code needed to declare an object properly. */
+
+#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
+ do { \
+ fprintf (FILE, "\t%s\t", TYPE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
+ putc ('\n', FILE); \
+ size_directive_output = 0; \
+ if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
+ { \
+ size_directive_output = 1; \
+ fprintf (FILE, "\t%s\t", SIZE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, \
+ int_size_in_bytes (TREE_TYPE (DECL))); \
+ fputc ('\n', FILE); \
+ } \
+ ASM_OUTPUT_LABEL(FILE, NAME); \
+ } while (0)
+
+/* Output the size directive for a decl in rest_of_decl_compilation
+ in the case where we did not do so before the initializer.
+ Once we find the error_mark_node, we know that the value of
+ size_directive_output was set
+ by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
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