[src/trunk]: src/sys/arch/vax/vax Enable cache on the 4000/VLC.

[mhitch <mhitch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c75cd4d5cd4c
branches:  trunk
changeset: 485076:c75cd4d5cd4c
user:      mhitch <mhitch%NetBSD.org@localhost>
date:      Tue Apr 18 16:28:04 2000 +0000

description:
Enable cache on the 4000/VLC.

diffstat:

 sys/arch/vax/vax/ka48.c |  33 +++++++++++----------------------
 1 files changed, 11 insertions(+), 22 deletions(-)

diffs (48 lines):

diff -r a6271a935325 -r c75cd4d5cd4c sys/arch/vax/vax/ka48.c
--- a/sys/arch/vax/vax/ka48.c   Tue Apr 18 16:25:59 2000 +0000
+++ b/sys/arch/vax/vax/ka48.c   Tue Apr 18 16:28:04 2000 +0000
@@ -101,33 +101,22 @@
 ka48_cache_enable()
 {
        int i, *tmp;
-       return; /*** not yet MK-990306 ***/
+       long *par_ctl = (long *)KA48_PARCTL;
 
-       /* Disable caches */
-       *(int *)KA48_CCR &= ~CCR_SPECIO;/* secondary */
-       mtpr(PCSTS_FLUSH, PR_PCSTS);    /* primary */
-       *(int *)KA48_BWF0 &= ~BWF0_FEN; /* invalidate filter */
+       /* Disable cache */
+       mtpr(0, PR_CADR);               /* disable */
+       *par_ctl &= ~KA48_PARCTL_INVENA;        /* clear ? invalid enable */
+       mtpr(2, PR_CADR);               /* flush */
 
        /* Clear caches */
        tmp = (void *)KA48_INVFLT;      /* inv filter */
-       for (i = 0; i < 32768; i++)
+       for (i = 0; i < KA48_INVFLTSZ / sizeof(int); i++)
                tmp[i] = 0;
-
-       /* Write valid parity to all primary cache entries */
-       for (i = 0; i < 256; i++) {
-               mtpr(i << 3, PR_PCIDX);
-               mtpr(PCTAG_PARITY, PR_PCTAG);
-       }
-
-       /* Secondary cache */
-       tmp = (void *)KA48_TAGST;
-       for (i = 0; i < KA48_TAGSZ*2; i+=2)
-               tmp[i] = 0;
-
-       /* Enable cache */
-       *(int *)KA48_BWF0 |= BWF0_FEN; /* invalidate filter */
-       mtpr(PCSTS_ENABLE, PR_PCSTS);
-       *(int *)KA48_CCR = CCR_SPECIO | CCR_CENA;
+       *par_ctl |= KA48_PARCTL_INVENA; /* Enable ???? */
+       mtpr(4, PR_CADR);               /* enable cache */
+       *par_ctl |= (KA48_PARCTL_AGS |  /* AGS? */
+           KA48_PARCTL_NPEN |          /* N? Parity Enable */
+           KA48_PARCTL_CPEN);          /* Cpu parity enable */
 }
 
 void