[src/netbsd-1-5]: src/sys/arch/sparc/dev Pull up tctrl.c 1.12, and ts102reg.h...

[toddpw <toddpw%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/bbaa6e7a0c90
branches:  netbsd-1-5
changeset: 488723:bbaa6e7a0c90
user:      toddpw <toddpw%NetBSD.org@localhost>
date:      Wed Jul 26 07:28:33 2000 +0000

description:
Pull up tctrl.c 1.12, and ts102reg.h 1.6 (both requested by toddpw):
  Prevent kernel freeze during boot on some Sparcbook 3gx's (namely, mine).
  Sparc "tctrl0" device was sensitive to undefined bits in the hardware.

diffstat:

 sys/arch/sparc/dev/tctrl.c    |  4 ++--
 sys/arch/sparc/dev/ts102reg.h |  3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diffs (35 lines):

diff -r af8a0329cd7c -r bbaa6e7a0c90 sys/arch/sparc/dev/tctrl.c
--- a/sys/arch/sparc/dev/tctrl.c        Wed Jul 26 00:29:02 2000 +0000
+++ b/sys/arch/sparc/dev/tctrl.c        Wed Jul 26 07:28:33 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tctrl.c,v 1.10.2.1 2000/07/19 02:53:13 mrg Exp $       */
+/*     $NetBSD: tctrl.c,v 1.10.2.2 2000/07/26 07:28:33 toddpw Exp $    */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -269,7 +269,7 @@
 
     again:
        /* find out the cause(s) of the interrupt */
-       v = tctrl_read(sc, TS102_REG_UCTRL_STS);
+       v = tctrl_read(sc, TS102_REG_UCTRL_STS) & TS102_UCTRL_STS_MASK;
 
        /* clear the cause(s) of the interrupt */
        tctrl_write(sc, TS102_REG_UCTRL_STS, v);
diff -r af8a0329cd7c -r bbaa6e7a0c90 sys/arch/sparc/dev/ts102reg.h
--- a/sys/arch/sparc/dev/ts102reg.h     Wed Jul 26 00:29:02 2000 +0000
+++ b/sys/arch/sparc/dev/ts102reg.h     Wed Jul 26 07:28:33 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ts102reg.h,v 1.5 2000/03/09 07:04:10 garbled Exp $ */
+/*     $NetBSD: ts102reg.h,v 1.5.4.1 2000/07/26 07:28:34 toddpw Exp $ */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -164,6 +164,7 @@
 #define        TS102_UCTRL_STS_TXNF_STA        0x02    /* transmit FIFO not full */
 #define        TS102_UCTRL_STS_RXNE_STA        0x04    /* receive FIFO not empty */
 #define        TS102_UCTRL_STS_RXO_STA         0x08    /* receive FIFO overflow */
+#define        TS102_UCTRL_STS_MASK            0x0F    /* Only 4 bits significant */
 
 enum ts102_opcode {                    /* Argument     Returned */
     TS102_OP_RD_SERIAL_NUM=0x01,       /* none         ack + 4 bytes */