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[src/netbsd-1-5]: src/sys/arch/vax Pull up (requested by ragge, approved by t...
details: https://anonhg.NetBSD.org/src/rev/94304370ade9
branches: netbsd-1-5
changeset: 489111:94304370ade9
user: ragge <ragge%NetBSD.org@localhost>
date: Mon Aug 14 21:11:00 2000 +0000
description:
Pull up (requested by ragge, approved by thorpej):
sys/arch/vax/conf/GENERIC 1.76-1.77
sys/arch/vax/conf/files.vax 1.74-1.75
sys/arch/vax/vax/intvec.s 1.54-1.55
sys/arch/vax/vax/unimpl_emul.s -1.2
This adds emulation code for the POLYD instruction that some VAX CPUs
are missing. POLYD is used for example in libm.
diffstat:
sys/arch/vax/conf/GENERIC | 5 +-
sys/arch/vax/conf/files.vax | 10 +-
sys/arch/vax/vax/intvec.s | 22 ++-
sys/arch/vax/vax/unimpl_emul.s | 270 +++++++++++++++++++++++++++++++++++++++++
4 files changed, 292 insertions(+), 15 deletions(-)
diffs (truncated from 387 to 300 lines):
diff -r e90d5d3f2c68 -r 94304370ade9 sys/arch/vax/conf/GENERIC
--- a/sys/arch/vax/conf/GENERIC Mon Aug 14 14:38:28 2000 +0000
+++ b/sys/arch/vax/conf/GENERIC Mon Aug 14 21:11:00 2000 +0000
@@ -1,11 +1,11 @@
-# $NetBSD: GENERIC,v 1.71.2.3 2000/08/11 20:18:09 mason Exp $
+# $NetBSD: GENERIC,v 1.71.2.4 2000/08/14 21:11:00 ragge Exp $
#
# GENERIC VAX configuration file; all supported devices.
#
include "arch/vax/conf/std.vax"
-#ident "GENERIC-$Revision: 1.71.2.3 $"
+#ident "GENERIC-$Revision: 1.71.2.4 $"
# Here are all different supported CPU types listed.
options "VAX8600"
@@ -91,6 +91,7 @@
options COMPAT_14
#options COMPAT_ULTRIX
options COMPAT_IBCS2 # DEC SVR.3 compatilibity
+options INSN_EMULATE # CPU lacks some hardware instructions.
options LKM
diff -r e90d5d3f2c68 -r 94304370ade9 sys/arch/vax/conf/files.vax
--- a/sys/arch/vax/conf/files.vax Mon Aug 14 14:38:28 2000 +0000
+++ b/sys/arch/vax/conf/files.vax Mon Aug 14 21:11:00 2000 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.vax,v 1.71.2.1 2000/07/27 16:53:16 matt Exp $
+# $NetBSD: files.vax,v 1.71.2.2 2000/08/14 21:11:01 ragge Exp $
#
# new style config file for vax architecture
#
@@ -22,6 +22,8 @@
VAX410 VAX43 VAX46 VAX48 VAX49 VAX53
VAX630 VAX640 VAX650 VAX660 VAX670 VAX680
+defopt opt_emulate.h INSN_EMULATE
+
# NBI on KA88
device nmi { slot=-1 }
attach nmi at mainbus with nmi_mainbus
@@ -338,10 +340,8 @@
file arch/vax/vax/ka660.c vax660
file arch/vax/vax/ka670.c vax670
file arch/vax/vax/ka680.c vax680
-file arch/vax/vax/emulate.s vax630|vax640|vax650|vax660|vax670|
- vax680|
- vax410|vax43|vax46|vax48|vax49|vax53|
- vax6200|vax6300|vax6400|vax6500|vax6600
+file arch/vax/vax/emulate.s insn_emulate
+file arch/vax/vax/unimpl_emul.s insn_emulate
file arch/vax/vax/scb.c
file arch/vax/vax/conf.c
file arch/vax/vax/urem.s
diff -r e90d5d3f2c68 -r 94304370ade9 sys/arch/vax/vax/intvec.s
--- a/sys/arch/vax/vax/intvec.s Mon Aug 14 14:38:28 2000 +0000
+++ b/sys/arch/vax/vax/intvec.s Mon Aug 14 21:11:00 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intvec.s,v 1.49.2.1 2000/07/27 16:53:18 matt Exp $ */
+/* $NetBSD: intvec.s,v 1.49.2.2 2000/08/14 21:11:02 ragge Exp $ */
/*
* Copyright (c) 1994, 1997 Ludd, University of Lule}, Sweden.
@@ -42,6 +42,7 @@
#include "ppp.h"
#include "opt_cputype.h"
+#include "opt_emulate.h"
#define ENTRY(name) \
.text ; \
@@ -201,7 +202,16 @@
TRAPCALL(invkstk, T_KSPNOTVAL)
- TRAPCALL(privinflt, T_PRIVINFLT)
+ .align 2
+ .globl privinflt
+privinflt:
+#ifdef INSN_EMULATE
+ jsb unimemu # do not return if insn emulated
+#endif
+ pushl $0
+ pushl $T_PRIVINFLT
+ jbr trap
+
TRAPCALL(xfcflt, T_XFCFLT);
TRAPCALL(resopflt, T_RESOPFLT)
TRAPCALL(resadflt, T_RESADFLT)
@@ -379,9 +389,7 @@
sbifltmsg:
.asciz "SBI fault"
-#if VAX630 || VAX640 || VAX650 || VAX660 || VAX670 || VAX680 || \
- VAX410 || VAX43 || VAX48 || VAX46 || VAX49 || VAX53 || \
- VAX6200 || VAX6300 || VAX6400 || VAX6500 || VAX6600
+#if INSN_EMULATE
/*
* Table of emulated Microvax instructions supported by emulate.s.
* Use noemulate to convert unimplemented ones to reserved instruction faults.
@@ -446,9 +454,7 @@
.align 2
.globl emulate
emulate:
-#if VAX630 || VAX640 || VAX650 || VAX660 || VAX670 || VAX680 || \
- VAX410 || VAX43 || VAX48 || VAX46 || VAX49 || VAX53 || \
- VAX6200 || VAX6300 || VAX6400 || VAX6500 || VAX6600
+#if INSN_EMULATE
movl r11,32(sp) # save register r11 in unused operand
movl r10,36(sp) # save register r10 in unused operand
cvtbl (sp),r10 # get opcode
diff -r e90d5d3f2c68 -r 94304370ade9 sys/arch/vax/vax/unimpl_emul.s
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/vax/vax/unimpl_emul.s Mon Aug 14 21:11:00 2000 +0000
@@ -0,0 +1,270 @@
+/* $NetBSD: unimpl_emul.s,v 1.2.2.2 2000/08/14 21:11:02 ragge Exp $ */
+
+/*
+ * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed at Ludd, University of
+ * Lule}, Sweden and its contributors.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <machine/asm.h>
+#include "assym.h"
+
+# Only intended for debugging emulation code (security hole)
+#undef EMULATE_INKERNEL
+
+# Defines to fetch register operands
+#define S_R0 (fp)
+#define S_R1 4(fp)
+#define S_R2 8(fp)
+#define S_R3 12(fp)
+#define S_R4 16(fp)
+#define S_R5 20(fp)
+#define S_R6 24(fp)
+#define S_R7 28(fp)
+#define S_R8 32(fp)
+#define S_R9 36(fp)
+#define S_R10 40(fp)
+#define S_R11 44(fp)
+#define S_AP 48(fp)
+#define S_FP 52(fp)
+#define S_SP 56(fp)
+#define S_PC 60(fp)
+#define S_PSL 64(fp)
+
+#
+# Emulation of instruction trapped via SCB vector 0x18. (reserved op)
+#
+unimemu:.globl unimemu
+ pushl r0
+ movl 8(sp),r0 # get trap address
+ movzbl (r0),r0 # fetch insn generating trap
+ caseb r0,$0x75,$0 # case to jump to address
+0: .word polyd-0b
+
+1: movl (sp)+,r0 # restore reg
+ rsb # continue fault
+
+#
+# switch the code back over to user mode.
+# puts the psl + pc (+ jsb return address) on top of user stack.
+#
+#ifdef EMULATE_INKERNEL
+touser: movl (sp),-52(sp) # save rsb address on top of new stack
+ movl 4(sp),r0 # restore saved reg
+ addl2 $12,sp # pop junk from stack
+ pushr $0x7fff # save all regs
+ movl sp,fp # new frame pointer
+ tstl -(sp) # remember old rsb address
+ incl S_PC # skip matching insn
+ rsb
+#else
+touser: mfpr $PR_USP,r0 # get user stack pointer
+ movl 4(sp),-68(r0) # move already saved r0
+ movl (sp),-72(r0) # move return address
+ movq 12(sp),-8(r0) # move pc + psl
+ addl2 $12,sp # remove moved fields from stack
+ movl $1f,(sp) # change return address
+ rei
+1: subl2 $8,sp # trapaddr + psl already on stack
+ pushr $0x7ffe # r0 already saved
+ subl2 $8,sp # do not trash r0 + retaddr
+ movab 4(sp),fp
+ incl S_PC # skip matching insn
+ rsb
+#endif
+
+#
+# Restore registers, cleanup and continue
+#
+goback: movl fp,sp # be sure
+ popr $0x7fff # restore all regs
+ rei
+#
+# getval_dfloat get 8 bytes and stores them in r0/r1. Increases PC.
+#
+getval_dfloat:
+ clrq r0
+ pushr $(R2+R3) # use r2+r3 as scratch reg
+ movl S_PC,r3 # argument address
+ extzv $4,$4,(r3),r2 # get mode
+ caseb r2,$0,$5
+0: .word 1f-0b # 0-3 literal
+ .word 1f-0b
+ .word 1f-0b
+ .word 1f-0b
+ .word 2f-0b # 4 indexed
+ .word 3f-0b # 5 register
+#ifdef EMULATE_INKERNEL
+2: movab 0f,r0
+ movl r2,r1
+ brw die
+0: .asciz "getval_dfloat: missing address mode %d\n"
+#else
+2: .word 0xffff # reserved operand
+#endif
+
+1: insv (r3),$0,$3,r0 # insert fraction
+ extzv $3,$3,(r3),r2 # get exponent
+ addl2 $128,r2 # bias the exponent
+ insv r2,$7,$8,r0 # insert exponent
+ tstl (r3)+
+ brb 4f
+
+3: extzv $0,$4,(r3),r2 # Get reg number
+ incl r3
+ ashl $2,r2,r2
+ addl2 fp,r2
+ movq (r2),r0
+
+4: movl r3,S_PC
+ popr $(R2+R3)
+ rsb
+
+#
+# getval_word get 2 bytes and stores them zero-extended in r0. Increases PC.
+#
+getval_word:
+ clrl r0
+ pushr $(R2+R3) # use r2+r3 as scratch reg
+ movl S_PC,r3 # argument address
+ extzv $4,$4,(r3),r2 # get mode
+ caseb r2,$0,$5
+0: .word 1f-0b # 0-3 literal
+ .word 1f-0b
+ .word 1f-0b
+ .word 1f-0b
+ .word 2f-0b # 4 indexed
+ .word 3f-0b # 5 register
+#ifdef EMULATE_INKERNEL
+2: movab 0f,r0
+ movl r2,r1
+ brw die
+0: .asciz "getval_word: missing address mode %d\n"
+#else
+2: .word 0xffff # reserved operand
+#endif
+
+1: movb (r3)+,r0 # correct operand
+ brb 4f
+
+3: extzv $0,$4,(r3),r2 # Get reg number
+ incl r3
+ ashl $2,r2,r2
+ addl2 fp,r2
+ movw (r2),r0
+
+4: movl r3,S_PC
+ popr $(R2+R3)
+ rsb
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