[src/trunk]: src/sys/arch/sparc64/dev Fix ordering of sync operations dependi...

[eeh <eeh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f736c4f12544
branches:  trunk
changeset: 487495:f736c4f12544
user:      eeh <eeh%NetBSD.org@localhost>
date:      Thu Jun 08 17:41:46 2000 +0000

description:
Fix ordering of sync operations depending on whether it's PRE- or POST-.

diffstat:

 sys/arch/sparc64/dev/sbus.c |  14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)

diffs (28 lines):

diff -r 1a11e4fc35f8 -r f736c4f12544 sys/arch/sparc64/dev/sbus.c
--- a/sys/arch/sparc64/dev/sbus.c       Thu Jun 08 17:39:44 2000 +0000
+++ b/sys/arch/sparc64/dev/sbus.c       Thu Jun 08 17:41:46 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sbus.c,v 1.29 2000/05/17 02:31:13 eeh Exp $ */
+/*     $NetBSD: sbus.c,v 1.30 2000/06/08 17:41:46 eeh Exp $ */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -810,8 +810,16 @@
 {
        struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie;
 
-       iommu_dvmamap_sync(tag, &sc->sc_is, map, offset, len, ops);
-       bus_dmamap_sync(tag->_parent, map, offset, len, ops);
+       if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) {
+               /* Flush the CPU then the IOMMU */
+               bus_dmamap_sync(tag->_parent, map, offset, len, ops);
+               iommu_dvmamap_sync(tag, &sc->sc_is, map, offset, len, ops);
+       }
+       if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) {
+               /* Flush the IOMMU then the CPU */
+               iommu_dvmamap_sync(tag, &sc->sc_is, map, offset, len, ops);
+               bus_dmamap_sync(tag->_parent, map, offset, len, ops);
+       }
 }
 
 int