[src/trunk]: src/sys/arch/hpcmips/tx 4bit greyscale mode currently disabled. ...

[uch <uch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7af11d50f30a
branches:  trunk
changeset: 480249:7af11d50f30a
user:      uch <uch%NetBSD.org@localhost>
date:      Fri Jan 07 15:10:50 2000 +0000

description:
4bit greyscale mode currently disabled. (change to 2bit greyscale)

diffstat:

 sys/arch/hpcmips/tx/tx3912video.c    |  24 +++++++++++++++++++++++-
 sys/arch/hpcmips/tx/tx3912videoreg.h |   5 ++++-
 2 files changed, 27 insertions(+), 2 deletions(-)

diffs (63 lines):

diff -r a92e78ad98c4 -r 7af11d50f30a sys/arch/hpcmips/tx/tx3912video.c
--- a/sys/arch/hpcmips/tx/tx3912video.c Fri Jan 07 14:46:03 2000 +0000
+++ b/sys/arch/hpcmips/tx/tx3912video.c Fri Jan 07 15:10:50 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tx3912video.c,v 1.6 2000/01/06 18:10:42 uch Exp $ */
+/*     $NetBSD: tx3912video.c,v 1.7 2000/01/07 15:10:50 uch Exp $ */
 
 /*
  * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
@@ -166,12 +166,34 @@
 {
        u_int32_t addr, size;
        int fb_depth;
+       txreg_t reg;
        
        /* Inquire bit depth */
        fb_depth = tx3912video_fbdepth(tc, 0);
+
+       switch (fb_depth) {
+       case 2:
+               bootinfo->fb_type = BIFB_D2_M2L_0;
+               break;
+       case 4:
+               /* XXX should implement rasops4.c */
+               fb_depth = 2;
+               bootinfo->fb_type = BIFB_D2_M2L_0;
+               reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);  
+               TX3912_VIDEOCTRL1_BITSEL_CLR(reg);
+               reg = TX3912_VIDEOCTRL1_BITSEL_SET(
+                       reg, TX3912_VIDEOCTRL1_BITSEL_2BITGREYSCALE);
+               tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg);
+               break;
+       case 8:
+               bootinfo->fb_type = BIFB_D8_FF;
+               break;
+       }
+
        tx3912video_chip.vc_fbdepth = fb_depth;
        tx3912video_chip.vc_fbwidth = fb_width;
        tx3912video_chip.vc_fbheight= fb_height;
+
        
        /* Allocate framebuffer area */
        if (tx3912video_framebuffer_alloc(tc, fb_start, fb_width, fb_height,
diff -r a92e78ad98c4 -r 7af11d50f30a sys/arch/hpcmips/tx/tx3912videoreg.h
--- a/sys/arch/hpcmips/tx/tx3912videoreg.h      Fri Jan 07 14:46:03 2000 +0000
+++ b/sys/arch/hpcmips/tx/tx3912videoreg.h      Fri Jan 07 15:10:50 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tx3912videoreg.h,v 1.1 1999/11/20 19:56:31 uch Exp $ */
+/*     $NetBSD: tx3912videoreg.h,v 1.2 2000/01/07 15:10:50 uch Exp $ */
 
 /*
  * Copyright (c) 1999, by UCHIYAMA Yasushi
@@ -88,6 +88,9 @@
 #define TX3912_VIDEOCTRL1_BITSEL(cr) \
        (((cr) >> TX3912_VIDEOCTRL1_BITSEL_SHIFT) & \
        TX3912_VIDEOCTRL1_BITSEL_MASK)
+#define TX3912_VIDEOCTRL1_BITSEL_CLR(cr) \
+       ((cr) &= ~(TX3912_VIDEOCTRL1_BITSEL_MASK << \
+                  TX3912_VIDEOCTRL1_BITSEL_SHIFT))
 #define TX3912_VIDEOCTRL1_BITSEL_SET(cr, val) \
        ((cr) | (((val) << TX3912_VIDEOCTRL1_BITSEL_SHIFT) & \
        (TX3912_VIDEOCTRL1_BITSEL_MASK << TX3912_VIDEOCTRL1_BITSEL_SHIFT)))