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[src/trunk]: src/sys/arch/amiga/dev The Ricoh chip has a seperate leapyear co...
details: https://anonhg.NetBSD.org/src/rev/e51fd9325bf8
branches: trunk
changeset: 480099:e51fd9325bf8
user: is <is%NetBSD.org@localhost>
date: Mon Jan 03 21:52:14 2000 +0000
description:
The Ricoh chip has a seperate leapyear counter.
We must write this when we write the year register, keeping them in sync.
XXX the chosen algorithm only works for 1901 <= year <= 2099.
diffstat:
sys/arch/amiga/dev/a34kbbc.c | 7 ++++---
sys/arch/amiga/dev/rtc.h | 5 ++++-
2 files changed, 8 insertions(+), 4 deletions(-)
diffs (47 lines):
diff -r 0120401c9194 -r e51fd9325bf8 sys/arch/amiga/dev/a34kbbc.c
--- a/sys/arch/amiga/dev/a34kbbc.c Mon Jan 03 20:30:51 2000 +0000
+++ b/sys/arch/amiga/dev/a34kbbc.c Mon Jan 03 21:52:14 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: a34kbbc.c,v 1.5 2000/01/03 20:30:51 is Exp $ */
+/* $NetBSD: a34kbbc.c,v 1.6 2000/01/03 21:52:14 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -130,7 +130,6 @@
/* let it run again.. */
rt->control1 = A3CONTROL1_FREE_CLOCK;
- printf("year read: %d.\n", dt.dt_year);
if (dt.dt_year < STARTOFTIME)
dt.dt_year += 100;
@@ -182,7 +181,9 @@
rt->month2 = dt.dt_mon % 10;
rt->year1 = (dt.dt_year / 10) % 10;
rt->year2 = dt.dt_year % 10;
- rt->control1 = A3CONTROL1_FREE_CLOCK;
+ rt->control1 = A3CONTROL1_HOLD_CLOCK | 1; /* mode 1 registers */
+ rt->leapyear = dt.dt_year; /* XXX implicit % 4 */
+ rt->control1 = A3CONTROL1_FREE_CLOCK; /* implies mode 0 */
return (1);
}
diff -r 0120401c9194 -r e51fd9325bf8 sys/arch/amiga/dev/rtc.h
--- a/sys/arch/amiga/dev/rtc.h Mon Jan 03 20:30:51 2000 +0000
+++ b/sys/arch/amiga/dev/rtc.h Mon Jan 03 21:52:14 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rtc.h,v 1.6 1999/03/14 22:42:12 is Exp $ */
+/* $NetBSD: rtc.h,v 1.7 2000/01/03 21:52:15 is Exp $ */
/*
* Copyright (c) 1994 Christian E. Hopps
@@ -92,6 +92,9 @@
#define A3CONTROL1_HOLD_CLOCK 0
#define A3CONTROL1_FREE_CLOCK 9
+/* mode1 registers used by us */
+#define leapyear year2
+
#define A3BBC_SET_REG 0xe0
#define A3BBC_WRITE_REG 0xc2
#define A3BBC_READ_REG 0xc3
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