[src/netbsd-1-5]: src Pull up (approved by thorpej):

[bouyer <bouyer%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/45df99b7f867
branches:  netbsd-1-5
changeset: 488776:45df99b7f867
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Thu Jul 27 16:28:47 2000 +0000

description:
Pull up (approved by thorpej):
sys/dev/pci/pciide.c 1.80 -> 1.81
sys/dev/pci/pciide_hpt_reg.h 1.1 -> 1.2
distrib/notes/i386/hardware 1.74 -> 1.75
share/man/man4/pciide.4 1.22 -> 1.23
Make sure the HPT370's interrupts disable bit is cleared. Now that HPT370
supports works, document it.

diffstat:

 distrib/notes/i386/hardware  |   4 ++--
 share/man/man4/pciide.4      |   4 ++--
 sys/dev/pci/pciide.c         |  12 ++++++++++--
 sys/dev/pci/pciide_hpt_reg.h |   5 ++++-
 4 files changed, 18 insertions(+), 7 deletions(-)

diffs (81 lines):

diff -r 8f07a8684718 -r 45df99b7f867 distrib/notes/i386/hardware
--- a/distrib/notes/i386/hardware       Thu Jul 27 16:25:17 2000 +0000
+++ b/distrib/notes/i386/hardware       Thu Jul 27 16:28:47 2000 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: hardware,v 1.71.2.3 2000/07/19 12:33:01 bouyer Exp $   
+.\"    $NetBSD: hardware,v 1.71.2.4 2000/07/27 16:28:47 bouyer Exp $   
 .Nx \*V
 runs on ISA (AT-Bus), EISA, PCI, and VL-bus systems
 with 386-family processors, with or without math coprocessors. Support
@@ -23,7 +23,7 @@
                 -  Acer labs M5229 IDE Controller
                 -  CMD Tech PCI0643, 0646, 0648 and 0649 IDE Controllers
                 -  Contaq Microsystems/Cypress CY82C693 IDE Controller
-                -  HighPoint HPT366 IDE Controller
+                -  HighPoint HPT366 and HPT370 (in Ultra/66 mode only)
                 -  Intel PIIX, PIIX3 and PIIX4 IDE Controllers
                 -  Intel 82801 (ICH/ICH0) IDE Controllers
                -  Promise PDC20246 (Ultra/33), PDC20262 (Ultra/66) and
diff -r 8f07a8684718 -r 45df99b7f867 share/man/man4/pciide.4
--- a/share/man/man4/pciide.4   Thu Jul 27 16:25:17 2000 +0000
+++ b/share/man/man4/pciide.4   Thu Jul 27 16:28:47 2000 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: pciide.4,v 1.19.2.3 2000/07/19 12:33:01 bouyer Exp $
+.\"    $NetBSD: pciide.4,v 1.19.2.4 2000/07/27 16:28:48 bouyer Exp $
 .\"
 .\" Copyright (c) 1998 Manuel Bouyer.
 .\"
@@ -62,7 +62,7 @@
 .It
 Contaq Microsystems/Cypress CY82C693 IDE Controller
 .It
-HighPoint HPT366 Ultra/66 IDE controller
+HighPoint HPT366 Ultra/66 and HPT370 Ultra/100 (in Ultra/66 mode) IDE controller
 .It
 Intel PIIX, PIIX3 and PIIX4 IDE Controllers
 .It
diff -r 8f07a8684718 -r 45df99b7f867 sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c      Thu Jul 27 16:25:17 2000 +0000
+++ b/sys/dev/pci/pciide.c      Thu Jul 27 16:28:47 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciide.c,v 1.68.2.8 2000/07/20 14:25:47 bouyer Exp $   */
+/*     $NetBSD: pciide.c,v 1.68.2.9 2000/07/27 16:28:48 bouyer Exp $   */
 
 
 /*
@@ -2898,7 +2898,15 @@
                wdcattach(&cp->wdc_channel);
                hpt_setup_channel(&cp->wdc_channel);
        }
-
+       if (revision == HPT370_REV) {
+               /*
+                * HPT370_REV has a bit to disable interrupts, make sure
+                * to clear it
+                */
+               pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT_CSEL,
+                   pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT_CSEL) &
+                   ~HPT_CSEL_IRQDIS);
+       }
        return;
 }
 
diff -r 8f07a8684718 -r 45df99b7f867 sys/dev/pci/pciide_hpt_reg.h
--- a/sys/dev/pci/pciide_hpt_reg.h      Thu Jul 27 16:25:17 2000 +0000
+++ b/sys/dev/pci/pciide_hpt_reg.h      Thu Jul 27 16:28:47 2000 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: pciide_hpt_reg.h,v 1.1 2000/06/12 21:20:51 bouyer Exp $       */
+/*      $NetBSD: pciide_hpt_reg.h,v 1.1.2.1 2000/07/27 16:28:48 bouyer Exp $       */
 
 /*
  * Copyright (c) 2000 Manuel Bouyer.
@@ -108,6 +108,9 @@
 #define HPT_STAT2_POLLST               0x01
 
 #define HPT_CSEL               0x5a
+#define HPT_CSEL_IRQDIS                        0x10 /* 370 only */
+#define HPT_CSEL_PCIDIS                        0x08 /* 370 only */
+#define HPT_CSEL_PCIWR                 0x04 /* 370 only */
 #define HPT_CSEL_CBLID(chan)            (0x01 << (1 - (chan)))
 
 static u_int32_t hpt366_pio[] =