[src/trunk]: src/sys/arch/powerpc/include Hardware Implementation Dependent r...

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/3d4a9ec4e794
branches:  trunk
changeset: 479683:3d4a9ec4e794
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Sat Dec 18 01:33:45 1999 +0000

description:
Hardware Implementation Dependent registers for the PowerPC 601.

diffstat:

 sys/arch/powerpc/include/Makefile  |   10 +-
 sys/arch/powerpc/include/hid_601.h |  103 +++++++++++++++++++++++++++++++++++++
 2 files changed, 108 insertions(+), 5 deletions(-)

diffs (128 lines):

diff -r 66f2d1204eaa -r 3d4a9ec4e794 sys/arch/powerpc/include/Makefile
--- a/sys/arch/powerpc/include/Makefile Fri Dec 17 21:55:11 1999 +0000
+++ b/sys/arch/powerpc/include/Makefile Sat Dec 18 01:33:45 1999 +0000
@@ -1,12 +1,12 @@
-#      $NetBSD: Makefile,v 1.4 1999/05/05 10:15:53 tsubai Exp $
+#      $NetBSD: Makefile,v 1.5 1999/12/18 01:33:46 thorpej Exp $
 
 KDIR=  /sys/arch/powerpc/include
 INCSDIR= /usr/include/powerpc
 
 INCS=  ansi.h aout_machdep.h asm.h bat.h bswap.h cdefs.h cpu.h db_machdep.h \
-       elf_machdep.h endian.h float.h fpu.h frame.h ieee.h ieeefp.h ipkdb.h \
-       kcore.h limits.h machine_type.h param.h pcb.h pmap.h proc.h profile.h \
-       psl.h pte.h ptrace.h reg.h reloc.h setjmp.h signal.h stdarg.h trap.h \
-       types.h va-ppc.h varargs.h vmparam.h
+       elf_machdep.h endian.h float.h fpu.h frame.h hid_601.h ieee.h \
+       ieeefp.h ipkdb.h kcore.h limits.h machine_type.h param.h pcb.h \
+       pmap.h proc.h profile.h psl.h pte.h ptrace.h reg.h reloc.h setjmp.h \
+       signal.h stdarg.h trap.h types.h va-ppc.h varargs.h vmparam.h
 
 .include <bsd.kinc.mk>
diff -r 66f2d1204eaa -r 3d4a9ec4e794 sys/arch/powerpc/include/hid_601.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/powerpc/include/hid_601.h        Sat Dec 18 01:33:45 1999 +0000
@@ -0,0 +1,103 @@
+/*     $NetBSD: hid_601.h,v 1.1 1999/12/18 01:33:45 thorpej Exp $      */
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the NetBSD
+ *     Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Hardware Implementation Dependent registers for the PowerPC 601.
+ */
+
+/*
+ * HID0 (SPR 1008) -- Checkstop Enable/Disable and Status register
+ */
+/*     v- feature bits -v                                              */
+#define        HID0_601_EHP    0x00000001      /* enable HP_SNP_REQ# */
+#define        HID0_601_EMC    0x00000002      /* main cache error */
+#define        HID0_601_PAR    0x00000004      /* precharge of ARTRY#/SHD# disabled */
+#define        HID0_601_LM     0x00000008      /* little endian mode */
+#define        HID0_601_DRL    0x00000010      /* alt sec rld of load/store miss */
+#define        HID0_601_DRF    0x00000020      /* alt sec rld of insn fetch miss */
+/*     v- checkstop enable/disable bits -v                             */
+#define        HID0_601_EPP    0x00000040      /* i/o protocol checkstop */
+#define        HID0_601_EIU    0x00000080      /* invalid uCode checkstop */
+#define        HID0_601_ECP    0x00000100      /* cache parity checkstop */
+#define        HID0_601_EBD    0x00000200      /* data bus parity checkstop */
+#define        HID0_601_EBA    0x00000400      /* address bus parity checkstop */
+#define        HID0_601_EDT    0x00000800      /* dispatch timeout checkstop */
+#define        HID0_601_ESH    0x00001000      /* sequencer timeout checkstop */
+#define        HID0_601_ECD    0x00002000      /* cache checkstop */
+#define        HID0_601_ETD    0x00004000      /* TLB checkstop */
+#define        HID0_601_EM     0x00008000      /* machine checkstop */
+#define        HID0_601_ES     0x00010000      /* uCode checkstop */
+               /*      0x00020000         reserved */
+               /*      0x00040000         reserved */
+               /*      0x00080000         reserved */
+/*     v- status bits -- correspond to enable bits above -v            */
+#define        HID0_601_PP     0x00100000
+#define        HID0_601_IU     0x00200000
+#define        HID0_601_CP     0x00400000
+#define        HID0_601_BD     0x00800000
+#define        HID0_601_BA     0x01000000
+#define        HID0_601_DT     0x02000000
+#define        HID0_601_SH     0x04000000
+#define        HID0_601_CD     0x08000000
+#define        HID0_601_TD     0x10000000
+#define        HID0_601_M      0x20000000
+#define        HID0_601_S      0x40000000
+
+#define        HID0_601_CE     0x80000000      /* master checkstop enable */
+
+
+/*
+ * HID1 (SPR 1009) -- Debug Modes register
+ */
+       /* XXX */
+
+
+/*
+ * HID2 (SPR 1010) -- Instruction Address Breakpoint Register
+ */
+
+
+/*
+ * HID5 (SPR 1013) -- Data Address Breakpoint Register
+ */
+
+
+/*
+ * HID15 (SPR 1023) -- Processor ID Register
+ */
+#define        HID15_601_PID   0x0000000f      /* processor ID mask */