[src/netbsd-1-5]: src/sys/arch/evbsh3/evbsh3 Pullup revision 1.18-1.19 (appro...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6f31b0cf215d
branches:  netbsd-1-5
changeset: 488976:6f31b0cf215d
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue Aug 08 19:05:51 2000 +0000

description:
Pullup revision 1.18-1.19 (approved by thorpej):

 fix adresses of some device registers of SH4

diffstat:

 sys/arch/evbsh3/evbsh3/locore.s |  42 ++++++++++++++++++++++++++++------------
 1 files changed, 29 insertions(+), 13 deletions(-)

diffs (176 lines):

diff -r 624f3aadbd13 -r 6f31b0cf215d sys/arch/evbsh3/evbsh3/locore.s
--- a/sys/arch/evbsh3/evbsh3/locore.s   Tue Aug 08 18:35:54 2000 +0000
+++ b/sys/arch/evbsh3/evbsh3/locore.s   Tue Aug 08 19:05:51 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.s,v 1.17 2000/06/07 05:28:18 msaitoh Exp $      */
+/*     $NetBSD: locore.s,v 1.17.2.1 2000/08/08 19:05:51 msaitoh Exp $  */
 
 /*-
  * Copyright (c) 1993, 1994, 1995, 1997
@@ -52,10 +52,18 @@
 #include <machine/trap.h>
 
 #define INIT_STACK     IOM_RAM_BEGIN + 0x003ff000
+
+#ifdef SH4
+#define SHREG_EXPEVT   0xff000024
+#define SHREG_INTEVT   0xff000028
+#define SHREG_MMUCR    0xff000010
+#define SHREG_TTB      0xff000008
+#else
 #define SHREG_EXPEVT   0xffffffd4
 #define SHREG_INTEVT   0xffffffd8
 #define SHREG_MMUCR    0xffffffe0
 #define SHREG_TTB      0xfffffff8
+#endif
 
 /*
  * These are used on interrupt or trap entry or exit.
@@ -270,7 +278,7 @@
        ldc     r0, sr
 
        xor     r0, r0
-       mov     #SHREG_MMUCR, r2
+       mov.l   XL_SHREG_MMUCR, r2
        mov.l   r0, @r2         /* MMU OFF */
 
        bra     start1
@@ -286,6 +294,7 @@
 #endif
        .align  2
 SR_init:       .long   0x500000F0
+XL_SHREG_MMUCR:        .long   SHREG_MMUCR
 start1:
 
 #ifdef ROMIMAGE
@@ -330,11 +339,13 @@
 LXstart_in_RAM:
        .long   start_in_RAM
 #else
+#ifndef        DONT_INIT_BSC
        /* Set Bus State Controler */
        mov.l   XLInitializeBsc, r0
        jsr     @r0
        nop
 #endif
+#endif
 
 start_in_RAM:
        mova    1f, r0
@@ -967,11 +978,11 @@
        nop
 
        mov.l   @r0, r0
-       mov     #SHREG_TTB, r2
+       mov.l   XL_SHREG_TTB, r2
        mov.l   r0, @r2
 
        /* flush TLB */
-       mov     #SHREG_MMUCR, r0
+       mov.l   XXL_SHREG_MMUCR, r0
        mov     #4, r1
        mov.l   @r0, r2
        or      r1, r2
@@ -1020,6 +1031,7 @@
 XL_ConvVtoP:   .long   _ConvVtoP
 XL_KernelSp:   .long   KernelSp
 XL_MMUCR_VBITS:        .long   0xfcfcff05
+XL_SHREG_TTB:  .long   SHREG_TTB
 /*
  * switch_exit(struct proc *p);
  * Switch to proc0's saved context and deallocate the address space and kernel
@@ -1052,11 +1064,11 @@
        mov     r10, r0
        add     #PCB_PAGEDIRREG, r0
        mov.l   @r0, r2
-       mov     #SHREG_TTB, r1
+       mov.l   XXL_SHREG_TTB, r1
        mov.l   r2, @r1
 
        /* flush TLB */
-       mov     #SHREG_MMUCR, r0
+       mov.l   XXL_SHREG_MMUCR, r0
        mov     #4, r1
        mov.l   @r0, r2
        or      r1, r2
@@ -1087,7 +1099,8 @@
        .globl  _C_LABEL(exit2)
 XLexit2:
        .long   _C_LABEL(exit2)
-
+XXL_SHREG_MMUCR:
+       .long   SHREG_MMUCR
 XXLP_ADDR:
        .long   P_ADDR
 
@@ -1140,7 +1153,7 @@
 100:
 #endif
 
-       mov     #SHREG_EXPEVT, r0
+       mov.l   XL_SHREG_EXPEVT, r0
        mov.l   @r0, r0
        cmp/eq  #0x40, r0       /* T_TLBINVALIDR */
        bf      1f
@@ -1156,7 +1169,7 @@
        bt      3b
 
        INTRENTRY
-       mov     #SHREG_EXPEVT, r0
+       mov.l   XL_SHREG_EXPEVT, r0
        mov.l   @r0, r0
        mov.l   r0, @-r15
        ESTI
@@ -1204,6 +1217,8 @@
        .align  2
 XL_TLBPROTWR:
        .long   0x000000c0
+XL_SHREG_EXPEVT:
+       .long   SHREG_EXPEVT
 
        .globl  _C_LABEL(tlbmisshandler_stub)
        .globl  _C_LABEL(tlbmisshandler_stub_end)
@@ -1318,7 +1333,7 @@
        neg     r1, r1
        shld    r1, r0
        shll2   r0
-       mov.l   XXXL_SHREG_TTB, r1
+       mov.l   XXL_SHREG_TTB, r1
        or      r5, r1  
        mov.l   @r1, r1
        add     r0, r1
@@ -1365,7 +1380,7 @@
        neg     r1, r1
        shld    r1, r0
        shll2   r0
-       mov     #SHREG_TTB, r1
+       mov.l   XXL_SHREG_TTB, r1
        mov.l   @r1, r1
        add     r0, r1
        mov.l   @r1, r2         /* r2 = pde */
@@ -1400,7 +1415,7 @@
 XL_PG_FRAME:   .long   PG_FRAME
 XL_CSMASK:     .long   0xc0000000
 XL_KCSAREA:    .long   0x80000000
-XXXL_SHREG_TTB:                .long   SHREG_TTB
+XXL_SHREG_TTB: .long   SHREG_TTB
 XL_P2AREA:     .long   0xa0000000
 #ifdef SH4
 XL_cacheflush: .long   _sh4_cache_flush
@@ -1432,7 +1447,7 @@
 100:
 #endif
 7:
-       mov     #SHREG_INTEVT, r0
+       mov.l   XL_SHREG_INTEVT, r0
        mov.l   @r0, r0
        mov.l   r0, @-r15
 6:
@@ -1487,6 +1502,7 @@
        INTRFASTEXIT
 
        .align  2
+XL_SHREG_INTEVT:       .long   SHREG_INTEVT
 XL_intrhandler:                .long   _C_LABEL(intrhandler)
 XXL_astpending:                .long   _C_LABEL(astpending)
 XXLT_ASTFLT:           .long   T_ASTFLT