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[src/trunk]: src/sys/arch/hpcmips TX39 IR module (connected to TX39 UARTB mod...



details:   https://anonhg.NetBSD.org/src/rev/1002d19265aa
branches:  trunk
changeset: 480475:1002d19265aa
user:      uch <uch%NetBSD.org@localhost>
date:      Thu Jan 13 17:53:35 2000 +0000

description:
TX39 IR module (connected to TX39 UARTB module)

diffstat:

 sys/arch/hpcmips/conf/TX3912        |   10 +-
 sys/arch/hpcmips/conf/files.hpcmips |    9 +-
 sys/arch/hpcmips/tx/tx39ir.c        |  149 +++++++++++++++++++++++++++++++++
 sys/arch/hpcmips/tx/tx39irreg.h     |  103 +++++++++++++++++++++++
 sys/arch/hpcmips/tx/tx39irvar.h     |   34 +++++++
 sys/arch/hpcmips/tx/txcom.c         |  161 +++++++++++++++++++++++------------
 6 files changed, 408 insertions(+), 58 deletions(-)

diffs (truncated from 670 to 300 lines):

diff -r 9b894d2c84b6 -r 1002d19265aa sys/arch/hpcmips/conf/TX3912
--- a/sys/arch/hpcmips/conf/TX3912      Thu Jan 13 17:14:56 2000 +0000
+++ b/sys/arch/hpcmips/conf/TX3912      Thu Jan 13 17:53:35 2000 +0000
@@ -2,7 +2,7 @@
 # Distribution kernel (TX3912 based model) kernel config file
 
 #
-#      $NetBSD: TX3912,v 1.7 2000/01/12 14:56:22 uch Exp $
+#      $NetBSD: TX3912,v 1.8 2000/01/13 17:53:40 uch Exp $
 #
 include                "arch/hpcmips/conf/std.hpcmips"
 
@@ -16,7 +16,7 @@
 
 options                TX39XX                  # Toshiba TX39 series
 options                TX391X                  # Product TMPR3912
-options                KSEG2IOBUFSIZE=0x08000000       # MCS0/MCS1 are mapped to kseg2
+options                KSEG2IOBUFSIZE=0x08000000       # MCS[0:3] are mapped to kseg2
 
 options                TX39_DEBUG
 options                TX39_WATCHDOGTIMER
@@ -37,6 +37,10 @@
 options                NKMEMCLUSTERS=1024      # 4K pages in kernel malloc pool
 #options        MINIROOTSIZE=10000
 
+options        PPP_BSDCOMP     # BSD-Compress compression support for PPP
+options        PPP_DEFLATE     # Deflate compression support for PPP
+options        PPP_FILTER      # Active filter support for PPP (requires bpf)
+
 options                COMPAT_43
 
 options        SCSIVERBOSE     # human readable SCSI error messages
@@ -68,6 +72,7 @@
 tx39uart*      at      txsim?
 txcom0         at      tx39uart? slot 0
 txcom1         at      tx39uart? slot 1
+tx39ir*                at      txcom1
 
 #
 # TX39 external modules. (Platform dependent)
@@ -138,6 +143,7 @@
 pseudo-device  md              1       # memory disk
 
 pseudo-device  bpfilter        8       # Berkeley packet filter
+pseudo-device  ipfilter                # IP filter (firewall) and NAT
 pseudo-device  loop            1       # network loopback
 pseudo-device  ppp             2       # Point-to-Point Protocol
 pseudo-device  pty             64      # pseudo ptys
diff -r 9b894d2c84b6 -r 1002d19265aa sys/arch/hpcmips/conf/files.hpcmips
--- a/sys/arch/hpcmips/conf/files.hpcmips       Thu Jan 13 17:14:56 2000 +0000
+++ b/sys/arch/hpcmips/conf/files.hpcmips       Thu Jan 13 17:53:35 2000 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.hpcmips,v 1.17 2000/01/12 14:56:23 uch Exp $
+#      $NetBSD: files.hpcmips,v 1.18 2000/01/13 17:53:39 uch Exp $
 
 # maxpartitions must be first item in files.${ARCH}.
 maxpartitions 8
@@ -174,6 +174,7 @@
 device txcomif {[slot = -1]}
 device txsibif {[slot = -1]}
 device ucbif { }
+device irif { }
 
 attach txsim at mainbus
 file arch/hpcmips/tx/txsim.c           txsim
@@ -228,10 +229,14 @@
 attach tx39uart at txsim
 file arch/hpcmips/tx/tx39uart.c                tx39uart        needs-flag
 
-device txcom
+device txcom: irif
 attach txcom at txcomif
 file arch/hpcmips/tx/txcom.c           txcom
 
+device tx39ir
+attach tx39ir at irif
+file arch/hpcmips/tx/tx39ir.c          tx39ir
+
 #      ITE IT8368E PCMCIA / TOSHIBA TC6345AF buffer chip (PCMCIA)
 device it8368e: pcmciabus
 attach it8368e at txcsbus
diff -r 9b894d2c84b6 -r 1002d19265aa sys/arch/hpcmips/tx/tx39ir.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/tx/tx39ir.c      Thu Jan 13 17:53:35 2000 +0000
@@ -0,0 +1,149 @@
+/*     $NetBSD: tx39ir.c,v 1.1 2000/01/13 17:53:35 uch Exp $ */
+
+/*
+ * Copyright (c) 2000, by UCHIYAMA Yasushi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * TX39 IR module (connected to UARTB)
+ */
+#undef TX39IRDEBUG
+#include "opt_tx39_debug.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <hpcmips/tx/tx39var.h>
+#include <hpcmips/tx/tx39icureg.h>
+#include <hpcmips/tx/tx39irvar.h>
+#include <hpcmips/tx/tx39irreg.h>
+
+#include <hpcmips/tx/tx39clockreg.h> /* XXX */
+
+#ifdef TX39IRDEBUG
+int    tx39ir_debug = 1;
+#define        DPRINTF(arg) if (vrpiu_debug) printf arg;
+#else
+#define        DPRINTF(arg)
+#endif
+
+int    tx39ir_match    __P((struct device*, struct cfdata*, void*));
+void   tx39ir_attach   __P((struct device*, struct device*, void*));
+
+struct tx39ir_softc {
+       struct  device sc_dev;
+       struct  device *sc_parent;
+       tx_chipset_tag_t sc_tc;
+};
+
+void   tx39ir_dump     __P((struct tx39ir_softc*));
+int    tx39ir_intr     __P((void*));
+
+struct cfattach tx39ir_ca = {
+       sizeof(struct tx39ir_softc), tx39ir_match, tx39ir_attach
+};
+
+int
+tx39ir_match(parent, cf, aux)
+       struct device *parent;
+       struct cfdata *cf;
+       void *aux;
+{
+       return 1;
+}
+
+void
+tx39ir_attach(parent, self, aux)
+       struct device *parent;
+       struct device *self;
+       void *aux;
+{
+       struct txcom_attach_args *tca = aux;
+       struct tx39ir_softc *sc = (void*)self;
+       tx_chipset_tag_t tc;
+       txreg_t reg;
+
+       sc->sc_tc = tc = tca->tca_tc;
+       sc->sc_parent = tca->tca_parent;
+
+       printf("\n");
+
+       /* setup IR module */
+       reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
+       reg |= TX39_IRCTRL1_RXPWR;
+       tx_conf_write(tc, TX39_IRCTRL1_REG, reg);
+
+       /* power up IR module */
+       reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
+       reg |= TX39_CLOCK_ENIRCLK | TX39_CLOCK_ENUARTBCLK;
+       tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
+
+       /* turn to pulse mode UARTB */
+       txcom_pulse_mode(sc->sc_parent);
+
+#if not_required_yet
+       tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
+                         IST_EDGE, IPL_TTY, tx39ir_intr, sc);
+       tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
+                         IST_EDGE, IPL_TTY, tx39ir_intr, sc);
+       tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
+                         IST_EDGE, IPL_TTY, tx39ir_intr, sc);
+#endif
+
+#ifdef TX39IRDEBUG
+       tx39ir_dump(sc);
+#endif 
+}
+
+#define ISSETPRINT(r, m) __is_set_print((u_int32_t)(r), \
+       TX39_IRCTRL1_##m, #m)
+
+void
+tx39ir_dump(sc)
+       struct tx39ir_softc *sc;
+{
+       tx_chipset_tag_t tc = sc->sc_tc;
+       txreg_t reg;
+
+       reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
+       ISSETPRINT(reg, CARDET);
+       ISSETPRINT(reg, TESTIR);
+       ISSETPRINT(reg, DTINVERT);
+       ISSETPRINT(reg, RXPWR);
+       ISSETPRINT(reg, ENSTATE);
+       ISSETPRINT(reg, ENCOMSM);
+       printf("baudval %d\n", TX39_IRCTRL1_BAUDVAL(reg));
+}
+
+int
+tx39ir_intr(arg)
+       void *arg;
+{
+       return 0;
+}
diff -r 9b894d2c84b6 -r 1002d19265aa sys/arch/hpcmips/tx/tx39irreg.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/tx/tx39irreg.h   Thu Jan 13 17:53:35 2000 +0000
@@ -0,0 +1,103 @@
+/*     $NetBSD: tx39irreg.h,v 1.1 2000/01/13 17:53:36 uch Exp $ */
+
+/*
+ * Copyright (c) 2000, by UCHIYAMA Yasushi
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+/*
+ * Toshiba TX3912 IR module
+ */
+
+#define TX39_IRCTRL1_REG       0x0a0 /* R/W */
+#define TX39_IRCTRL2_REG       0x0a4 /* W */
+#define TX39_IRTXHOLD_REG      0x0a8 /* W */
+
+/*
+ * IR control 1 register
+ */
+#define TX39_IRCTRL1_CARDET    0x01000000
+
+#define TX39_IRCTRL1_BAUDVAL_SHIFT     16
+#define TX39_IRCTRL1_BAUDVAL_MASK      0xff
+#define TX39_IRCTRL1_BAUDVAL(cr) \
+       (((cr) >> TX39_IRCTRL1_BAUDVAL_SHIFT) & \
+       TX39_IRCTRL1_BAUDVAL_MASK)
+#define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \
+       ((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \
+       (TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT)))
+#define TX39_IRCTRL1_BAUDVAL_CLR(cr) \
+       ((cr) &= ~(TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT))
+
+#define TX39_IRCTRL1_TESTIR    0x00000010 /* don't set */
+#define TX39_IRCTRL1_DTINVERT  0x00000008
+#define TX39_IRCTRL1_RXPWR     0x00000004
+#define TX39_IRCTRL1_ENSTATE   0x00000002
+#define TX39_IRCTRL1_ENCOMSM   0x00000001
+
+/*
+ * IR control 2 register
+ */
+/*
+ * period = (PER + 1) * (BAUDVAL + 1) * (1/3.6864MHz)



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