[src/netbsd-1-5]: src/sys/dev/pci Pull up revision 1.101 (requested by bouyer):

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e1027c3bd770
branches:  netbsd-1-5
changeset: 490639:e1027c3bd770
user:      he <he%NetBSD.org@localhost>
date:      Sun Feb 04 18:42:34 2001 +0000

description:
Pull up revision 1.101 (requested by bouyer):
  Add support for Ultra/100 on the HPT370 controller.

diffstat:

 sys/dev/pci/pciide.c |  11 ++++++++---
 1 files changed, 8 insertions(+), 3 deletions(-)

diffs (64 lines):

diff -r 1db1f46ae466 -r e1027c3bd770 sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c      Sun Feb 04 18:42:17 2001 +0000
+++ b/sys/dev/pci/pciide.c      Sun Feb 04 18:42:34 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciide.c,v 1.68.2.15 2000/12/15 04:30:47 he Exp $      */
+/*     $NetBSD: pciide.c,v 1.68.2.16 2001/02/04 18:42:34 he Exp $      */
 
 
 /*
@@ -2303,6 +2303,7 @@
                if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
                        if (drvp->drive_flags & DRIVE_UDMA) {
                                /* UltraDMA on a 646U2, 0648 or 0649 */
+                               drvp->drive_flags &= ~DRIVE_DMA;
                                udma_reg = pciide_pci_read(sc->sc_pc,
                                    sc->sc_tag, CMD_UDMATIM(chp->channel));
                                if (drvp->UDMA_mode > 2 &&
@@ -2896,11 +2897,11 @@
        }
        sc->sc_wdcdev.PIO_cap = 4;
        sc->sc_wdcdev.DMA_cap = 2;
-       sc->sc_wdcdev.UDMA_cap = 4;
 
        sc->sc_wdcdev.set_modes = hpt_setup_channel;
        sc->sc_wdcdev.channels = sc->wdc_chanarray;
        if (revision == HPT366_REV) {
+               sc->sc_wdcdev.UDMA_cap = 4;
                /*
                 * The 366 has 2 PCI IDE functions, one for primary and one
                 * for secondary. So we need to call pciide_mapregs_compat()
@@ -2918,6 +2919,7 @@
                sc->sc_wdcdev.nchannels = 1;
        } else {
                sc->sc_wdcdev.nchannels = 2;
+               sc->sc_wdcdev.UDMA_cap = 5;
        }
        for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
                cp = &sc->pciide_channels[i];
@@ -2958,7 +2960,6 @@
        return;
 }
 
-
 void
 hpt_setup_channel(chp)
        struct channel_softc *chp;
@@ -2989,6 +2990,8 @@
 
                 /* add timing values, setup DMA if needed */
                 if (drvp->drive_flags & DRIVE_UDMA) {
+                       /* use Ultra/DMA */
+                       drvp->drive_flags &= ~DRIVE_DMA;
                        if ((cable & HPT_CSEL_CBLID(chp->channel)) != 0 &&
                            drvp->UDMA_mode > 2)
                                drvp->UDMA_mode = 2;
@@ -3253,6 +3256,8 @@
                        continue;
                mode = 0;
                if (drvp->drive_flags & DRIVE_UDMA) {
+                       /* use Ultra/DMA */
+                       drvp->drive_flags &= ~DRIVE_DMA;
                        mode = PDC2xx_TIM_SET_MB(mode,
                            pdc2xx_udma_mb[drvp->UDMA_mode]);
                        mode = PDC2xx_TIM_SET_MC(mode,