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[src/netbsd-1-5]: src/sys/dev/pci Back out previous two pullups, they have "i...
details: https://anonhg.NetBSD.org/src/rev/0cc53986cf81
branches: netbsd-1-5
changeset: 490664:0cc53986cf81
user: he <he%NetBSD.org@localhost>
date: Mon Feb 26 15:51:40 2001 +0000
description:
Back out previous two pullups, they have "issues".
I must be getting rusty...
diffstat:
sys/dev/pci/cs4280.c | 43 +++++++++++++++++++++++++++----------------
1 files changed, 27 insertions(+), 16 deletions(-)
diffs (123 lines):
diff -r c988d747bc06 -r 0cc53986cf81 sys/dev/pci/cs4280.c
--- a/sys/dev/pci/cs4280.c Mon Feb 26 15:48:48 2001 +0000
+++ b/sys/dev/pci/cs4280.c Mon Feb 26 15:51:40 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cs4280.c,v 1.4.4.4 2001/02/26 15:48:48 he Exp $ */
+/* $NetBSD: cs4280.c,v 1.4.4.5 2001/02/26 15:51:40 he Exp $ */
/*
* Copyright (c) 1999, 2000 Tatoku Ogaito. All rights reserved.
@@ -158,6 +158,7 @@
char sc_suspend;
void *sc_powerhook; /* Power Hook */
+ u_int16_t ac97_reg[CS4280_SAVE_REG_MAX + 1]; /* Save ac97 registers */
};
#define BA0READ4(sc, r) bus_space_read_4((sc)->ba0t, (sc)->ba0h, (r))
@@ -685,15 +686,16 @@
struct cs4280_softc *sc = p;
u_int32_t intr, mem;
char * empty_dma;
- int handled = 0;
+
+ intr = BA0READ4(sc, CS4280_HISR);
- /* grab interrupt register then clear it */
- intr = BA0READ4(sc, CS4280_HISR);
- BA0WRITE4(sc, CS4280_HICR, HICR_CHGM | HICR_IEV);
-
+ if ((intr & HISR_INTENA) == 0) {
+ BA0WRITE4(sc, CS4280_HICR, HICR_CHGM | HICR_IEV);
+ return (0);
+ }
+
/* Playback Interrupt */
if (intr & HISR_PINT) {
- handled = 1;
mem = BA1READ4(sc, CS4280_PFIE);
BA1WRITE4(sc, CS4280_PFIE, (mem & ~PFIE_PI_MASK) | PFIE_PI_DISABLE);
if (sc->sc_pintr) {
@@ -718,7 +720,6 @@
int i;
int16_t rdata;
- handled = 1;
mem = BA1READ4(sc, CS4280_CIE);
BA1WRITE4(sc, CS4280_CIE, (mem & ~CIE_CI_MASK) | CIE_CI_DISABLE);
++sc->sc_ri;
@@ -780,7 +781,6 @@
if (intr & HISR_MIDI) {
int data;
- handled = 1;
DPRINTF(("i: %d: ",
BA0READ4(sc, CS4280_MIDSR)));
/* Read the received data */
@@ -812,8 +812,9 @@
DPRINTF(("\n"));
}
#endif
-
- return (handled);
+ /* Throw EOI */
+ BA0WRITE4(sc, CS4280_HICR, HICR_CHGM | HICR_IEV);
+ return (1);
}
@@ -1654,8 +1655,7 @@
delay(50*1000); /* delay 50ms */
/* Turn on clock */
- mem = BA0READ4(sc, CS4280_CLKCR1) | CLKCR1_SWCE;
- BA0WRITE4(sc, CS4280_CLKCR1, mem);
+ BA0WRITE4(sc, CS4280_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE);
/* Set the serial port FIFO pointer to the
* first sample in FIFO. (not documented) */
@@ -1687,8 +1687,7 @@
/* Wait for valid AC97 input slot */
n = 0;
- while ((BA0READ4(sc, CS4280_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=
- (ACISV_ISV3 | ACISV_ISV4)) {
+ while (BA0READ4(sc, CS4280_ACISV) != (ACISV_ISV3 | ACISV_ISV4)) {
delay(1000);
if (++n > 1000) {
printf("AC97 inputs slot ready timeout\n");
@@ -1782,6 +1781,7 @@
void *v;
{
struct cs4280_softc *sc = (struct cs4280_softc *)v;
+ int i;
DPRINTF(("%s: cs4280_power why=%d\n",
sc->sc_dev.dv_xname, why));
@@ -1790,6 +1790,12 @@
cs4280_halt_output(sc);
cs4280_halt_input(sc);
+ /* Save AC97 registers */
+ for(i = 1; i <= CS4280_SAVE_REG_MAX; i++) {
+ if(i == 0x04) /* AC97_REG_MASTER_TONE */
+ continue;
+ cs4280_read_codec(sc, 2*i, &sc->ac97_reg[i]);
+ }
/* should I powerdown here ? */
cs4280_write_codec(sc, AC97_REG_POWER, CS4280_POWER_DOWN_ALL);
} else {
@@ -1802,7 +1808,12 @@
cs4280_init(sc, 0);
cs4280_reset_codec(sc);
- (*sc->codec_if->vtbl->restore_ports)(sc->codec_if);
+ /* restore ac97 registers */
+ for(i = 1; i <= CS4280_SAVE_REG_MAX; i++) {
+ if(i == 0x04) /* AC97_REG_MASTER_TONE */
+ continue;
+ cs4280_write_codec(sc, 2*i, sc->ac97_reg[i]);
+ }
}
}
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