[src/netbsd-1-5]: src/sys/arch/i386/i386 Pull up revisions 1.408, 1.413, 1.428 ...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/19b01800f2a4
branches:  netbsd-1-5
changeset: 490972:19b01800f2a4
user:      he <he%NetBSD.org@localhost>
date:      Fri Mar 30 21:30:17 2001 +0000

description:
Pull up revisions 1.408,1.413,1.428 (via patch, requested by fvdl):
  Add some required Linux emulation bits to support the Linux
  version of VMware.

diffstat:

 sys/arch/i386/i386/machdep.c |  31 ++++++++++++++++++++++++++++---
 1 files changed, 28 insertions(+), 3 deletions(-)

diffs (66 lines):

diff -r d9208a587249 -r 19b01800f2a4 sys/arch/i386/i386/machdep.c
--- a/sys/arch/i386/i386/machdep.c      Fri Mar 30 21:29:32 2001 +0000
+++ b/sys/arch/i386/i386/machdep.c      Fri Mar 30 21:30:17 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.389.2.2 2000/08/17 18:52:55 fvdl Exp $   */
+/*     $NetBSD: machdep.c,v 1.389.2.3 2001/03/30 21:30:17 he Exp $     */
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -192,7 +192,9 @@
 int    dumpmem_high;
 int    boothowto;
 int    cpu_class;
-int    i386_fpu_present = 0;
+int    i386_fpu_present;
+int    i386_fpu_exception;
+int    i386_fpu_fdivbug;
 
 #define        CPUID2MODEL(cpuid)      (((cpuid) >> 4) & 15)
 
@@ -219,6 +221,11 @@
 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
 int    mem_cluster_cnt;
 
+/*
+ * The number of CPU cycles in one second.
+ */
+u_int64_t cpu_tsc_freq;
+
 int    cpu_dump __P((void));
 int    cpu_dumpsize __P((void));
 u_long cpu_dump_mempagecnt __P((void));
@@ -279,7 +286,11 @@
 
        printf(version);
 
-       printf("cpu0: %s\n", cpu_model);
+       printf("cpu0: %s", cpu_model);
+       if (cpu_tsc_freq != 0)
+               printf(", %qd.%02qd MHz", (cpu_tsc_freq + 4999) / 1000000,
+                   ((cpu_tsc_freq + 4999) / 10000) % 100);
+       printf("\n");
 
        format_bytes(pbuf, sizeof(pbuf), ptoa(physmem));
        printf("total memory = %s\n", pbuf);
@@ -831,6 +842,20 @@
        if (cpu_class >= CPUCLASS_486)
                lcr0(rcr0() | CR0_WP);
 #endif
+
+#if defined(I586_CPU) || defined(I686_CPU)
+       /*
+        * If we have a cycle counter, compute the approximate
+        * CPU speed in MHz.
+        */
+       if (cpu_feature & CPUID_TSC) {
+               u_int64_t last_tsc;
+
+               last_tsc = rdtsc();
+               delay(100000);
+               cpu_tsc_freq = (rdtsc() - last_tsc) * 10;
+       }
+#endif
 }
 
 /*