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[src/trunk]: src/sys/arch CPU specific idle hook and VR idle routine.



details:   https://anonhg.NetBSD.org/src/rev/e481b481a416
branches:  trunk
changeset: 481412:e481b481a416
user:      takemura <takemura%NetBSD.org@localhost>
date:      Fri Jan 28 15:08:36 2000 +0000

description:
CPU specific idle hook and VR idle routine.

diffstat:

 sys/arch/hpcmips/conf/files.hpcmips |   3 +-
 sys/arch/hpcmips/hpcmips/cpu.c      |  11 ++++-
 sys/arch/hpcmips/vr/vr.c            |   3 +-
 sys/arch/hpcmips/vr/vr.h            |   9 +---
 sys/arch/hpcmips/vr/vr_asm.h        |  42 ++++++++++++++++++
 sys/arch/hpcmips/vr/vr_idle.S       |  83 +++++++++++++++++++++++++++++++++++++
 sys/arch/mips/include/locore.h      |   4 +-
 sys/arch/mips/mips/genassym.cf      |   3 +-
 sys/arch/mips/mips/locore.S         |  20 ++++++--
 sys/arch/mips/mips/mips_machdep.c   |  10 ++-
 sys/arch/mips/mips/trap.c           |   8 +-
 11 files changed, 170 insertions(+), 26 deletions(-)

diffs (truncated from 402 to 300 lines):

diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/conf/files.hpcmips
--- a/sys/arch/hpcmips/conf/files.hpcmips       Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/hpcmips/conf/files.hpcmips       Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.hpcmips,v 1.19 2000/01/16 21:47:00 uch Exp $
+#      $NetBSD: files.hpcmips,v 1.20 2000/01/28 15:08:37 takemura Exp $
 
 # maxpartitions must be first item in files.${ARCH}.
 maxpartitions 8
@@ -39,6 +39,7 @@
 # CPU-dependent files
 #
 file   arch/hpcmips/vr/vr.c            vr41x1  # NEC VR4000 series
+file   arch/hpcmips/vr/vr_idle.S       vr41x1
 file   arch/hpcmips/tx/tx39.c          tx39xx  # TOSHIBA TX3900 series
 
 file   arch/mips/mips/fp.S             softfloat
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/hpcmips/cpu.c
--- a/sys/arch/hpcmips/hpcmips/cpu.c    Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/hpcmips/hpcmips/cpu.c    Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.1.1.1 1999/09/16 12:23:20 takemura Exp $     */
+/*     $NetBSD: cpu.c,v 1.2 2000/01/28 15:08:38 takemura Exp $ */
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -31,9 +31,12 @@
 #include <sys/device.h>
 #include <sys/systm.h>
 
+#include <mips/locore.h>
 #include <machine/cpu.h>
 #include <machine/bus.h>
 #include <machine/autoconf.h>
+#include <machine/platid.h>
+#include <machine/platid_mask.h>
 
 /* Definition of the driver for autoconfig. */
 static int     cpumatch(struct device *, struct cfdata *, void *);
@@ -46,6 +49,7 @@
 extern struct cfdriver cpu_cd;
 
 extern void cpu_identify __P((void));
+extern void vr_idle __P((void));
 
 
 static int
@@ -74,4 +78,9 @@
        printf(": ");
 
        cpu_identify();
+
+       if (platid_match(&platid, &platid_mask_CPU_MIPS_VR_41XX)) {
+               printf("cpu0: install VR specific idle routine\n");
+               mips_locore_jumpvec.cpu_idle = vr_idle;
+       }
 }
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/vr/vr.c
--- a/sys/arch/hpcmips/vr/vr.c  Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/hpcmips/vr/vr.c  Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vr.c,v 1.10 1999/12/16 13:09:02 shin Exp $     */
+/*     $NetBSD: vr.c,v 1.11 2000/01/28 15:08:38 takemura Exp $ */
 
 /*-
  * Copyright (c) 1999
@@ -52,6 +52,7 @@
 #include <mips/mips/mips_mcclock.h>    /* mcclock CPUspeed estimation */
 
 #include <hpcmips/vr/vr.h>
+#include <hpcmips/vr/vr_asm.h>
 #include <hpcmips/vr/vripreg.h>
 #include <hpcmips/vr/rtcreg.h>
 #include <hpcmips/hpcmips/machdep.h>   /* XXXjrs replace with vectors */
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/vr/vr.h
--- a/sys/arch/hpcmips/vr/vr.h  Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/hpcmips/vr/vr.h  Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vr.h,v 1.2 1999/11/28 12:11:45 takemura Exp $  */
+/*     $NetBSD: vr.h,v 1.3 2000/01/28 15:08:38 takemura Exp $  */
 
 /*-
  * Copyright (c) 1999
@@ -41,10 +41,3 @@
 #define VR_INTR1       1
 #define VR_INTR2       2
 #define VR_INTR3       3
-
-/*
- *  special instructions, which are not supported by assembler.
- */
-#define VR_OPCODE_STANDBY      0x42000021
-#define VR_OPCODE_SUSPEND      0x42000022
-#define VR_OPCODE_HIBERNATE    0x42000023
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/vr/vr_asm.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vr_asm.h      Fri Jan 28 15:08:36 2000 +0000
@@ -0,0 +1,42 @@
+/*     $NetBSD: vr_asm.h,v 1.1 2000/01/28 15:08:38 takemura Exp $      */
+
+/*-
+ * Copyright (c) 1999
+ *         Shin Takemura and PocketBSD Project. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the PocketBSD project
+ *     and its contributors.
+ * 4. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ *  special instructions, which are not supported by assembler.
+ */
+#define VR_OPCODE_STANDBY      0x42000021
+#define VR_OPCODE_SUSPEND      0x42000022
+#define VR_OPCODE_HIBERNATE    0x42000023
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/hpcmips/vr/vr_idle.S
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vr_idle.S     Fri Jan 28 15:08:36 2000 +0000
@@ -0,0 +1,83 @@
+/*     $NetBSD: vr_idle.S,v 1.1 2000/01/28 15:08:38 takemura Exp $     */
+
+/*
+ * Copyright (c) 1992, 1993
+ *     The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Digital Equipment Corporation and Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the University of
+ *     California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Copyright (C) 1989 Digital Equipment Corporation.
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose and without fee is hereby granted,
+ * provided that the above copyright notice appears in all copies.
+ * Digital Equipment Corporation makes no representations about the
+ * suitability of this software for any purpose.  It is provided "as is"
+ * without express or implied warranty.
+ *
+ */
+
+#include <mips/asm.h>
+#include <mips/cpuregs.h>
+#include <hpcmips/vr/vr_asm.h>
+
+#include "assym.h"
+
+       .set    noreorder
+
+/*
+ * When no processes are on the runq, cpu_switch branches to idle
+ * to wait for something to come ready.
+ * Note: this is really a part of cpu_switch() but defined here for kernel
+ * profiling.
+ */
+LEAF(vr_idle)
+       li      t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
+       mtc0    t0, MIPS_COP_0_STATUS           # enable all interrupts
+       nop
+       sw      zero, _C_LABEL(curproc)         # set curproc NULL for stats
+1:
+       lw      t0, _C_LABEL(whichqs)           # look for non-empty queue
+       nop
+       bne     t0, zero, 1f
+       nop
+       .word   VR_OPCODE_STANDBY
+       nop
+       nop
+       nop
+       nop
+       beq     t0, zero, 1b
+       nop
+1:
+       la      ra, cpu_switch1
+       j       ra
+       mtc0    zero, MIPS_COP_0_STATUS         # disable all interrupts
+END(vr_idle)
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/mips/include/locore.h
--- a/sys/arch/mips/include/locore.h    Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/mips/include/locore.h    Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.h,v 1.23 2000/01/09 10:05:55 simonb Exp $       */
+/*     $NetBSD: locore.h,v 1.24 2000/01/28 15:08:36 takemura Exp $     */
 
 /*
  * Copyright 1996 The Board of Trustees of The Leland Stanford
@@ -52,6 +52,7 @@
 
 extern u_int32_t mips_read_causereg __P((void));
 extern u_int32_t mips_read_statusreg __P((void));
+extern void mips_idle __P((void));
 
 extern void mips1_ConfigCache  __P((void));
 extern void mips1_FlushCache  __P((void));
@@ -122,6 +123,7 @@
        void (*wbflush) __P((void));
        void (*proc_trampoline) __P((void));
        void (*cpu_switch_resume) __P((void));
+       void (*cpu_idle) __P((void));
 } mips_locore_jumpvec_t;
 
 /* Override writebuffer-drain method. */
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/mips/mips/genassym.cf
--- a/sys/arch/mips/mips/genassym.cf    Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/mips/mips/genassym.cf    Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.13 1999/11/18 06:47:49 jun Exp $
+#      $NetBSD: genassym.cf,v 1.14 2000/01/28 15:08:37 takemura Exp $
 #
 # Copyright (c) 1997
 #  Jonathan Stone.  All rights reserved.
@@ -80,6 +80,7 @@
 
 define MIPSX_FLUSHICACHE       offsetof(mips_locore_jumpvec_t, flushICache)
 define MIPSX_CPU_SWITCH_RESUME offsetof(mips_locore_jumpvec_t, cpu_switch_resume)
+define MIPSX_CPU_IDLE          offsetof(mips_locore_jumpvec_t, cpu_idle)
 
 define MIPS1_PG_G              MIPS1_PG_G
 define MIPS1_PG_V              MIPS1_PG_V
diff -r 2fd411c568a3 -r e481b481a416 sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S       Fri Jan 28 15:02:11 2000 +0000
+++ b/sys/arch/mips/mips/locore.S       Fri Jan 28 15:08:36 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.84 2000/01/09 08:01:54 shin Exp $ */
+/*     $NetBSD: locore.S,v 1.85 2000/01/28 15:08:37 takemura Exp $     */
 
 /*
  * Copyright (c) 1992, 1993
@@ -259,7 +259,7 @@
  * Note: this is really a part of cpu_switch() but defined here for kernel
  * profiling.
  */
-LEAF(idle)
+LEAF(mips_idle)
        li      t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
        mtc0    t0, MIPS_COP_0_STATUS           # enable all interrupts
        nop
@@ -285,7 +285,7 @@
        la      ra, sw1
        j       ra
        mtc0    zero, MIPS_COP_0_STATUS         # disable all interrupts
-END(idle)
+END(mips_idle)
 
 /*
  * cpu_switch(struct proc *)
@@ -315,11 +315,17 @@
        lw      t1, _C_LABEL(whichqs)
        addu    t0, t0, 1
        sw      t0, uvmexp+UVMEXP_SWTCH



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