[src/trunk]: src/sys/arch/mips/mips change TX3922 D-cache mode to write-through.

[uch <uch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/2e4a90f12a76
branches:  trunk
changeset: 486409:2e4a90f12a76
user:      uch <uch%NetBSD.org@localhost>
date:      Sun May 21 11:53:00 2000 +0000

description:
change TX3922 D-cache mode to write-through.

diffstat:

 sys/arch/mips/mips/locore.S |  12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diffs (33 lines):

diff -r acfc0b0779c8 -r 2e4a90f12a76 sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S       Sun May 21 11:24:45 2000 +0000
+++ b/sys/arch/mips/mips/locore.S       Sun May 21 11:53:00 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.97 2000/05/10 01:34:14 nisimura Exp $     */
+/*     $NetBSD: locore.S,v 1.98 2000/05/21 11:53:00 uch Exp $  */
 
 /*
  * Copyright (c) 1992, 1993
@@ -101,6 +101,15 @@
        la      gp, _C_LABEL(_gp)
 #endif
 
+#ifdef ENABLE_MIPS_TX3900
+       /* 
+        * TX3922 write-through D-cache mode. 
+        *  for TX3912, no meaning. (no write-back mode)
+        */
+       mfc0    t0, R3900_COP_0_CONFIG
+       li      t1, 0xffffdfff
+       and     t0, t0, t1
+       mtc0    t0, R3900_COP_0_CONFIG
 #ifdef R3900_CACHE_DISABLE
        li      t0, ~(R3900_CONFIG_ICE|R3900_CONFIG_DCE)
        mfc0    t1, R3900_COP_0_CONFIG
@@ -109,6 +118,7 @@
        mtc0    t1, R3900_COP_0_CONFIG
        nop
 #endif /* R3900_CACHE_DISABLE */
+#endif /* ENABLE_MIPS_TX3900 */        
 
 #ifdef NOFPU /* No FPU; avoid touching FPU registers */
        li      t0, 0                           # Disable interrupts and