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[src/netbsd-1-5]: src/sys/dev/pci Pull up revisions 1.113-1.116 (via patch, r...
details: https://anonhg.NetBSD.org/src/rev/cf513127de64
branches: netbsd-1-5
changeset: 491743:cf513127de64
user: he <he%NetBSD.org@localhost>
date: Tue May 15 20:52:51 2001 +0000
description:
Pull up revisions 1.113-1.116 (via patch, requested by bouyer):
Add support for newer VIA pciide controllers.
Add support for the AMD 766 pciide controller.
Properly distinguish between HPT366 and HPT370 controllers.
diffstat:
sys/dev/pci/pciide.c | 224 +++++++++++++++++++++++++++++---------------------
1 files changed, 130 insertions(+), 94 deletions(-)
diffs (truncated from 476 to 300 lines):
diff -r 2f030aba394d -r cf513127de64 sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c Tue May 15 20:51:30 2001 +0000
+++ b/sys/dev/pci/pciide.c Tue May 15 20:52:51 2001 +0000
@@ -1,8 +1,8 @@
-/* $NetBSD: pciide.c,v 1.68.2.23 2001/04/24 23:05:30 he Exp $ */
+/* $NetBSD: pciide.c,v 1.68.2.24 2001/05/15 20:52:51 he Exp $ */
/*
- * Copyright (c) 1999 Manuel Bouyer.
+ * Copyright (c) 1999, 2000, 2001 Manuel Bouyer.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -162,8 +162,8 @@
static u_int32_t piix_setup_idetim_drvs __P((struct ata_drive_datas*));
static u_int32_t piix_setup_sidetim_timings __P((u_int8_t, u_int8_t, u_int8_t));
-void amd756_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
-void amd756_setup_channel __P((struct channel_softc*));
+void amd7x6_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
+void amd7x6_setup_channel __P((struct channel_softc*));
void apollo_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
void apollo_setup_channel __P((struct channel_softc*));
@@ -269,6 +269,7 @@
{ 0,
0,
NULL,
+ NULL
}
};
@@ -276,11 +277,17 @@
{ PCI_PRODUCT_AMD_PBC756_IDE,
0,
"Advanced Micro Devices AMD756 IDE Controller",
- amd756_chip_map
+ amd7x6_chip_map
+ },
+ { PCI_PRODUCT_AMD_PBC766_IDE,
+ 0,
+ "Advanced Micro Devices AMD766 IDE Controller",
+ amd7x6_chip_map
},
{ 0,
0,
NULL,
+ NULL
}
};
@@ -313,23 +320,25 @@
{ 0,
0,
NULL,
+ NULL
}
};
const struct pciide_product_desc pciide_via_products[] = {
{ PCI_PRODUCT_VIATECH_VT82C586_IDE,
0,
- "VIA Tech VT82C586 IDE Controller",
+ NULL,
apollo_chip_map,
},
{ PCI_PRODUCT_VIATECH_VT82C586A_IDE,
0,
- "VIA Tech VT82C586A IDE Controller",
+ NULL,
apollo_chip_map,
},
{ 0,
0,
NULL,
+ NULL
}
};
@@ -342,6 +351,7 @@
{ 0,
0,
NULL,
+ NULL
}
};
@@ -354,6 +364,7 @@
{ 0,
0,
NULL,
+ NULL
}
};
@@ -366,6 +377,7 @@
{ 0,
0,
NULL,
+ NULL
}
};
@@ -393,6 +405,7 @@
{ 0,
0,
NULL,
+ NULL
}
};
@@ -415,18 +428,20 @@
{ 0,
0,
NULL,
+ NULL
}
};
const struct pciide_product_desc pciide_triones_products[] = {
{ PCI_PRODUCT_TRIONES_HPT366,
IDE_PCI_CLASS_OVERRIDE,
- "Triones/Highpoint HPT366/370 IDE Controller",
+ NULL,
hpt_chip_map,
},
{ 0,
0,
NULL,
+ NULL
}
};
@@ -492,11 +507,11 @@
if ((pp = vp->ide_products) == NULL)
return NULL;
- for (; pp->ide_name != NULL; pp++)
+ for (; pp->chip_map != NULL; pp++)
if (PCI_PRODUCT(id) == pp->ide_product)
break;
- if (pp->ide_name == NULL)
+ if (pp->chip_map == NULL)
return NULL;
return pp;
}
@@ -553,7 +568,10 @@
} else
displaydev = sc->sc_pp->ide_name;
- printf(": %s (rev. 0x%02x)\n", displaydev, PCI_REVISION(pa->pa_class));
+ /* if displaydev == NULL, printf is done in chip-specific map */
+ if (displaydev)
+ printf(": %s (rev. 0x%02x)\n", displaydev,
+ PCI_REVISION(pa->pa_class));
sc->sc_pc = pa->pa_pc;
sc->sc_tag = pa->pa_tag;
@@ -1779,7 +1797,7 @@
}
void
-amd756_chip_map(sc, pa)
+amd7x6_chip_map(sc, pa)
struct pciide_softc *sc;
struct pci_attach_args *pa;
{
@@ -1804,20 +1822,24 @@
}
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
- sc->sc_wdcdev.UDMA_cap = 4;
- sc->sc_wdcdev.set_modes = amd756_setup_channel;
+
+ if (sc->sc_pp->ide_product == PCI_PRODUCT_AMD_PBC766_IDE)
+ sc->sc_wdcdev.UDMA_cap = 5;
+ else
+ sc->sc_wdcdev.UDMA_cap = 4;
+ sc->sc_wdcdev.set_modes = amd7x6_setup_channel;
sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
- chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_CHANSTATUS_EN);
-
- WDCDEBUG_PRINT(("amd756_chip_map: Channel enable=0x%x\n", chanenable),
+ chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD7X6_CHANSTATUS_EN);
+
+ WDCDEBUG_PRINT(("amd7x6_chip_map: Channel enable=0x%x\n", chanenable),
DEBUG_PROBE);
for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
cp = &sc->pciide_channels[channel];
if (pciide_chansetup(sc, channel, interface) == 0)
continue;
- if ((chanenable & AMD756_CHAN_EN(channel)) == 0) {
+ if ((chanenable & AMD7X6_CHAN_EN(channel)) == 0) {
printf("%s: %s channel ignored (disabled)\n",
sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
continue;
@@ -1826,20 +1848,20 @@
pciide_pci_intr);
if (pciide_chan_candisable(cp))
- chanenable &= ~AMD756_CHAN_EN(channel);
+ chanenable &= ~AMD7X6_CHAN_EN(channel);
pciide_map_compat_intr(pa, cp, channel, interface);
if (cp->hw_ok == 0)
continue;
- amd756_setup_channel(&cp->wdc_channel);
+ amd7x6_setup_channel(&cp->wdc_channel);
}
- pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_CHANSTATUS_EN,
+ pci_conf_write(sc->sc_pc, sc->sc_tag, AMD7X6_CHANSTATUS_EN,
chanenable);
return;
}
void
-amd756_setup_channel(chp)
+amd7x6_setup_channel(chp)
struct channel_softc *chp;
{
u_int32_t udmatim_reg, datatim_reg;
@@ -1854,10 +1876,10 @@
#endif
idedma_ctl = 0;
- datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_DATATIM);
- udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_UDMA);
- datatim_reg &= ~AMD756_DATATIM_MASK(chp->channel);
- udmatim_reg &= ~AMD756_UDMA_MASK(chp->channel);
+ datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD7X6_DATATIM);
+ udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD7X6_UDMA);
+ datatim_reg &= ~AMD7X6_DATATIM_MASK(chp->channel);
+ udmatim_reg &= ~AMD7X6_UDMA_MASK(chp->channel);
/* setup DMA if needed */
pciide_channel_dma_setup(cp);
@@ -1877,10 +1899,10 @@
(drvp->drive_flags & DRIVE_UDMA)) {
/* use Ultra/DMA */
drvp->drive_flags &= ~DRIVE_DMA;
- udmatim_reg |= AMD756_UDMA_EN(chp->channel, drive) |
- AMD756_UDMA_EN_MTH(chp->channel, drive) |
- AMD756_UDMA_TIME(chp->channel, drive,
- amd756_udma_tim[drvp->UDMA_mode]);
+ udmatim_reg |= AMD7X6_UDMA_EN(chp->channel, drive) |
+ AMD7X6_UDMA_EN_MTH(chp->channel, drive) |
+ AMD7X6_UDMA_TIME(chp->channel, drive,
+ amd7x6_udma_tim[drvp->UDMA_mode]);
/* can use PIO timings, MW DMA unused */
mode = drvp->PIO_mode;
} else {
@@ -1893,7 +1915,9 @@
* PCIIDE_AMD756_ENABLEDMA. It causes a hard hang if
* triggered.
*/
- if (AMD756_CHIPREV_DISABLEDMA(rev)) {
+ if (sc->sc_pp->ide_product ==
+ PCI_PRODUCT_AMD_PBC756_IDE &&
+ AMD756_CHIPREV_DISABLEDMA(rev)) {
printf("%s:%d:%d: multi-word DMA disabled due "
"to chip revision\n",
sc->sc_wdcdev.sc_dev.dv_xname,
@@ -1921,10 +1945,10 @@
drvp->DMA_mode = mode - 2;
}
datatim_reg |=
- AMD756_DATATIM_PULSE(chp->channel, drive,
- amd756_pio_set[mode]) |
- AMD756_DATATIM_RECOV(chp->channel, drive,
- amd756_pio_rec[mode]);
+ AMD7X6_DATATIM_PULSE(chp->channel, drive,
+ amd7x6_pio_set[mode]) |
+ AMD7X6_DATATIM_RECOV(chp->channel, drive,
+ amd7x6_pio_rec[mode]);
}
if (idedma_ctl != 0) {
/* Add software bits in status register */
@@ -1933,8 +1957,8 @@
idedma_ctl);
}
pciide_print_modes(cp);
- pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_DATATIM, datatim_reg);
- pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_UDMA, udmatim_reg);
+ pci_conf_write(sc->sc_pc, sc->sc_tag, AMD7X6_DATATIM, datatim_reg);
+ pci_conf_write(sc->sc_pc, sc->sc_tag, AMD7X6_UDMA, udmatim_reg);
}
void
@@ -1944,13 +1968,56 @@
{
struct pciide_channel *cp;
pcireg_t interface = PCI_INTERFACE(pa->pa_class);
- int rev = PCI_REVISION(pa->pa_class);
int channel;
- u_int32_t ideconf, udma_conf, old_udma_conf;
+ u_int32_t ideconf;
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