[src/trunk]: src/sys/dev/pci Actually program the DMA mode of the drives into...

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e79570037af5
branches:  trunk
changeset: 487354:e79570037af5
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Tue Jun 06 17:34:22 2000 +0000

description:
Actually program the DMA mode of the drives into the Cypress
controller.  Fixes a long-standing problem where IDE DMA wasn't
working on the AlphaPC 164SX.

diffstat:

 sys/dev/pci/pciide.c    |  34 +++++++++++++++++++++++++++-------
 sys/dev/pci/pciidevar.h |   7 ++++++-
 2 files changed, 33 insertions(+), 8 deletions(-)

diffs (120 lines):

diff -r 77737ed80820 -r e79570037af5 sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c      Tue Jun 06 17:32:50 2000 +0000
+++ b/sys/dev/pci/pciide.c      Tue Jun 06 17:34:22 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciide.c,v 1.60 2000/06/04 22:22:12 gmcgarry Exp $     */
+/*     $NetBSD: pciide.c,v 1.61 2000/06/06 17:34:22 thorpej Exp $      */
 
 
 /*
@@ -117,6 +117,8 @@
 #include <dev/pci/pciide_pdc202xx_reg.h>
 #include <dev/pci/pciide_opti_reg.h>
 
+#include <dev/pci/cy82c693var.h>
+
 /* inlines for reading/writing 8-bit PCI registers */
 static __inline u_int8_t pciide_pci_read __P((pci_chipset_tag_t, pcitag_t,
                                              int));
@@ -305,7 +307,7 @@
 const struct pciide_product_desc pciide_cypress_products[] =  {
        { PCI_PRODUCT_CONTAQ_82C693,
          0,
-         "Contaq Microsystems CY82C693 IDE Controller",
+         "Cypress CY82C693 IDE Controller",
          cy693_chip_map,
        },
        { 0,
@@ -2177,7 +2179,6 @@
        struct pciide_channel *cp;
        pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
                                    sc->sc_tag, PCI_CLASS_REG));
-       int compatchan;
        bus_size_t cmdsize, ctlsize;
 
        if (pciide_chipen(sc, pa) == 0)
@@ -2188,9 +2189,9 @@
         * the real channel
         */
        if (pa->pa_function == 1) {
-               compatchan = 0;
+               sc->sc_cy_compatchan = 0;
        } else if (pa->pa_function == 2) {
-               compatchan = 1;
+               sc->sc_cy_compatchan = 1;
        } else {
                printf("%s: unexpected PCI function %d\n",
                    sc->sc_wdcdev.sc_dev.dv_xname, pa->pa_function);
@@ -2207,6 +2208,13 @@
        }
        printf("\n");
 
+       sc->sc_cy_handle = cy82c693_init(pa->pa_iot);
+       if (sc->sc_cy_handle == NULL) {
+               printf("%s: unable to map hyperCache control registers\n",
+                   sc->sc_wdcdev.sc_dev.dv_xname);
+               sc->sc_dma_ok = 0;
+       }
+
        if (sc->sc_dma_ok)
                sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
        sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
@@ -2242,7 +2250,7 @@
                    pciide_pci_intr);
        } else {
                printf("compatibility");
-               cp->hw_ok = pciide_mapregs_compat(pa, cp, compatchan,
+               cp->hw_ok = pciide_mapregs_compat(pa, cp, sc->sc_cy_compatchan,
                    &cmdsize, &ctlsize);
        }
        printf(" mode\n");
@@ -2253,7 +2261,7 @@
                pci_conf_write(sc->sc_pc, sc->sc_tag,
                    PCI_COMMAND_STATUS_REG, 0);
        }
-       pciide_map_compat_intr(pa, cp, compatchan, interface);
+       pciide_map_compat_intr(pa, cp, sc->sc_cy_compatchan, interface);
        if (cp->hw_ok == 0)
                return;
        WDCDEBUG_PRINT(("cy693_chip_map: old timings reg 0x%x\n",
@@ -2304,7 +2312,19 @@
        pci_conf_write(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL, cy_cmd_ctrl);
        chp->ch_drive[0].DMA_mode = dma_mode;
        chp->ch_drive[1].DMA_mode = dma_mode;
+
+       if (dma_mode == -1)
+               dma_mode = 0;
+
+       if (sc->sc_cy_handle != NULL) {
+               /* Note: `multiple' is implied. */
+               cy82c693_write(sc->sc_cy_handle,
+                   (sc->sc_cy_compatchan == 0) ?
+                   CY_DMA_IDX_PRIMARY : CY_DMA_IDX_SECONDARY, dma_mode);
+       }
+
        pciide_print_modes(cp);
+
        if (idedma_ctl != 0) {
                /* Add software bits in status register */
                bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
diff -r 77737ed80820 -r e79570037af5 sys/dev/pci/pciidevar.h
--- a/sys/dev/pci/pciidevar.h   Tue Jun 06 17:32:50 2000 +0000
+++ b/sys/dev/pci/pciidevar.h   Tue Jun 06 17:34:22 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciidevar.h,v 1.4 2000/04/01 14:32:24 bouyer Exp $     */
+/*     $NetBSD: pciidevar.h,v 1.5 2000/06/06 17:34:23 thorpej Exp $    */
 
 /*
  * Copyright (c) 1998 Christopher G. Demetriou.  All rights reserved.
@@ -51,6 +51,11 @@
        bus_space_tag_t         sc_dma_iot;
        bus_space_handle_t      sc_dma_ioh;
        bus_dma_tag_t           sc_dmat;
+
+       /* For Cypress */
+       const struct cy82c693_handle *sc_cy_handle;
+       int sc_cy_compatchan;
+
        /* Chip description */
        const struct pciide_product_desc *sc_pp;
        /* common definitions */