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[src/sommerfeld_i386mp_1]: src/sys/arch/i386/i386 CPU driver (handles identif...



details:   https://anonhg.NetBSD.org/src/rev/5f50e50fc071
branches:  sommerfeld_i386mp_1
changeset: 482156:5f50e50fc071
user:      sommerfeld <sommerfeld%NetBSD.org@localhost>
date:      Sun Feb 20 17:07:21 2000 +0000

description:
CPU driver (handles identification and configuration, and spinup of
secondary CPUs).

diffstat:

 sys/arch/i386/i386/cpu.c |  406 +++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 406 insertions(+), 0 deletions(-)

diffs (truncated from 410 to 300 lines):

diff -r d7e95c59e6a9 -r 5f50e50fc071 sys/arch/i386/i386/cpu.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/i386/i386/cpu.c  Sun Feb 20 17:07:21 2000 +0000
@@ -0,0 +1,406 @@
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by RedBack Networks Inc.
+ *
+ * Author: Bill Sommerfeld
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1999 Stefan Grefen
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the NetBSD
+ *      Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.  
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR AND CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_ddb.h"
+#include "opt_multiprocessor.h"
+#include "opt_mpbios.h"                /* for MPDEBUG */
+
+#include "lapic.h"
+
+#include <sys/param.h>
+#include <sys/proc.h>
+#include <sys/user.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <vm/vm.h>
+#include <vm/vm_kern.h>
+#include <vm/vm_page.h>
+ 
+#include <uvm/uvm_extern.h>
+
+#include <machine/cpu.h>
+#include <machine/cpufunc.h>
+#include <machine/cpuvar.h>
+#include <machine/pmap.h>
+#include <machine/vmparam.h>
+#include <machine/mpbiosvar.h>
+#include <machine/pcb.h>
+#include <machine/specialreg.h>
+#include <machine/segments.h>
+
+#if NLAPIC > 0
+#include <machine/apicvar.h>
+#include <machine/i82489reg.h>
+#include <machine/i82489var.h>
+#endif
+
+int     cpu_match __P((struct device *, struct cfdata *, void *));
+void    cpu_attach __P((struct device *, struct device *, void *));
+
+#ifdef MULTIPROCESSOR
+/*
+ * Array of CPU info structures.  Must be statically-allocated because
+ * curproc, etc. are used early.
+ */
+
+static struct cpu_info dummy_cpu_info;
+struct cpu_info *cpu_info[I386_MAXPROCS] = { &dummy_cpu_info };
+extern 
+
+void           cpu_hatch __P((void *));
+static void            cpu_boot_secondary __P((struct cpu_info *ci));
+static void    cpu_copy_trampoline __P((void));
+#endif
+
+struct cfattach cpu_ca = {
+       sizeof(struct cpu_info), cpu_match, cpu_attach
+};
+
+int
+cpu_match(parent, match, aux)
+    struct device *parent;  
+    struct cfdata *match;   
+    void *aux;
+{
+       struct cpu_attach_args * caa = (struct cpu_attach_args *) aux;
+
+       if (strcmp(caa->caa_name, match->cf_driver->cd_name) == 0)
+               return 1;
+       return 0;
+}
+
+void 
+cpu_attach(parent, self, aux)   
+       struct device *parent, *self;
+       void *aux;
+{
+       struct cpu_info *ci = (struct cpu_info *)self;  
+       struct cpu_attach_args  *caa = (struct cpu_attach_args  *) aux;
+#ifdef MULTIPROCESSOR
+       int cpunum = caa->cpu_number;
+       vaddr_t kstack;
+       struct pcb *pcb;
+#endif
+       
+#ifdef MULTIPROCESSOR
+       if (cpunum == 0) {                                          /* XXX */
+               /* special-case CPU 0 */                            /* XXX */
+               if (cpu_info[0] == &dummy_cpu_info) {               /* XXX */
+                       ci->ci_curproc = dummy_cpu_info.ci_curproc; /* XXX */
+                       cpu_info[0] = NULL;                         /* XXX */
+               }                                                   /* XXX */
+       }                                                           /* XXX */
+       if (cpu_info[cpunum] != NULL)
+               panic("cpu %d already attached?", cpunum);
+
+       cpu_info[cpunum] = ci;
+#endif                 
+
+       ci->ci_cpuid = caa->cpu_number;
+       ci->ci_signature = caa->cpu_signature;
+       ci->ci_feature_flags = caa->feature_flags;
+       ci->ci_func = caa->cpu_func;
+
+#ifdef MULTIPROCESSOR
+       /*
+        * Allocate UPAGES contiguous pages for the idle PCB and stack.
+        */
+
+       kstack = uvm_km_alloc (kernel_map, USPACE);
+       if (kstack == 0) {
+               if (cpunum == 0) { /* XXX */
+                       panic("cpu_attach: unable to allocate idle stack for"
+                           " primary");
+               }
+               printf("%s: unable to allocate idle stack\n",
+                   ci->ci_dev.dv_xname);
+               return;
+       }
+       pcb = ci->ci_idle_pcb = (struct pcb *) kstack;
+       memset(pcb, 0, USPACE);
+
+       pcb->pcb_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
+       pcb->pcb_tss.tss_esp0 = kstack + USPACE - 16 - sizeof (struct trapframe);
+       pcb->pcb_tss.tss_esp = kstack + USPACE - 16 - sizeof (struct trapframe);
+       pcb->pcb_pmap = pmap_kernel();
+       pcb->pcb_cr3 = pcb->pcb_pmap->pm_pdirpa;
+#endif
+
+       /* further PCB init done later. */
+
+       printf(": ");
+
+       switch (caa->cpu_role) {
+       case CPU_ROLE_SP:
+               printf("(uniprocessor)\n");
+               ci->ci_flags |= CPUF_PRESENT | CPUF_SP;
+               identifycpu(ci);
+               cpu_init(ci);
+#if NLAPIC > 0
+               if (caa->lapic_paddr) {
+                       /*
+                        * Map, and enable local apic
+                        */
+                       lapic_map(caa->lapic_paddr);
+                       lapic_enable();
+                       lapic_calibrate_timer(ci);
+               }
+#endif
+               break;
+
+       case CPU_ROLE_BP:
+               printf("apid %d (", caa->cpu_number);
+               printf("boot processor");
+               ci->ci_flags |= CPUF_PRESENT | CPUF_BSP;
+#ifdef MULTIPROCESSOR          
+               cpu_copy_trampoline(); /* XXX WRONG PLACE */
+#endif
+               printf(")\n");
+               identifycpu(ci);
+               cpu_init(ci);
+
+#if NLAPIC > 0
+               if (caa->lapic_paddr) {
+                       /*
+                        * Map, and enable local apic
+                        */
+                       lapic_map(caa->lapic_paddr);
+                       lapic_enable();
+                       lapic_calibrate_timer(ci);
+               }
+#endif
+               break;
+               
+       case CPU_ROLE_AP:
+               /*
+                * report on an AP
+                */
+               printf("apid %d (", caa->cpu_number);
+               ci->ci_flags |= CPUF_PRESENT | CPUF_AP;
+               printf("application processor");
+               printf(")\n");
+               identifycpu(ci);
+               break;
+               
+       default:
+               panic("unknown processor type??\n");
+       }
+
+#ifdef MULTIPROCESSOR
+       if (mp_verbose) {
+               printf("%s: kstack at 0x%lx for %d bytes\n",
+                   ci->ci_dev.dv_xname, kstack, USPACE);
+               printf("%s: idle pcb at %p, idle sp at 0x%x\n", 
+                   ci->ci_dev.dv_xname, pcb, pcb->pcb_esp);
+       }
+#endif
+}
+
+/*
+ * Initialize the processor appropriately.
+ */
+
+void
+cpu_init(ci)
+       struct cpu_info *ci;
+{
+       /* configure the CPU if needed */
+       if (ci->cpu_setup != NULL)
+               (*ci->cpu_setup)();
+
+#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
+       /*
+        * On a 486 or above, enable ring 0 write protection.
+        */
+       if (ci->cpu_class >= CPUCLASS_486)
+               lcr0(rcr0() | CR0_WP);
+#endif
+       if (cpu_feature & CPUID_PGE)
+               lcr4(rcr4() | CR4_PGE); /* enable global TLB caching */
+
+       ci->ci_flags |= CPUF_RUNNING;
+}
+
+
+#ifdef MULTIPROCESSOR
+
+void
+cpu_boot_secondary_processors()



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