Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/mips/alchemy Remove some debug code accidently left...
details: https://anonhg.NetBSD.org/src/rev/282c89017f09
branches: trunk
changeset: 534569:282c89017f09
user: simonb <simonb%NetBSD.org@localhost>
date: Mon Jul 29 16:25:02 2002 +0000
description:
Remove some debug code accidently left in.
diffstat:
sys/arch/mips/alchemy/au_icu.c | 45 ++---------------------------------
sys/arch/mips/alchemy/dev/if_aumac.c | 6 ++--
2 files changed, 6 insertions(+), 45 deletions(-)
diffs (122 lines):
diff -r 4a0eb1335301 -r 282c89017f09 sys/arch/mips/alchemy/au_icu.c
--- a/sys/arch/mips/alchemy/au_icu.c Mon Jul 29 16:22:55 2002 +0000
+++ b/sys/arch/mips/alchemy/au_icu.c Mon Jul 29 16:25:02 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: au_icu.c,v 1.1 2002/07/29 15:39:11 simonb Exp $ */
+/* $NetBSD: au_icu.c,v 1.2 2002/07/29 16:25:02 simonb Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -59,13 +59,6 @@
#include <mips/alchemy/include/aureg.h>
#include <mips/alchemy/include/auvar.h>
-#if 0
-#include <evbmips/evbmips/clockvar.h>
-#include <mips/alchemy/include/aubusvar.h>
-#endif
-
-#include <dev/ic/mc146818reg.h>
-
#define REGVAL(x) *((__volatile u_int32_t *)(MIPS_PHYS_TO_KSEG1((x))))
/*
@@ -73,9 +66,6 @@
* given hardware interrupt priority level.
*/
-// #define ENABLE_AUMAC_HW1 /* XXX */
-#undef ENABLE_AUMAC_HW1 /* XXX */
-
const u_int32_t ipl_sr_bits[_IPL_N] = {
0, /* 0: IPL_NONE */
@@ -89,9 +79,6 @@
MIPS_SOFT_INT_MASK_0|
MIPS_SOFT_INT_MASK_1|
-
- MIPS_SOFT_INT_MASK_0|
- MIPS_SOFT_INT_MASK_1|
MIPS_INT_MASK_0, /* 5: IPL_BIO */
MIPS_SOFT_INT_MASK_0|
@@ -100,29 +87,7 @@
MIPS_SOFT_INT_MASK_0|
MIPS_SOFT_INT_MASK_1|
- MIPS_INT_MASK_0|
-#ifdef ENABLE_AUMAC_HW1
- MIPS_INT_MASK_1, /* 7: IPL_AUMAC */
-#else
- 0, /* 7: IPL_AUMAC */
-#endif
-
- MIPS_SOFT_INT_MASK_0|
- MIPS_SOFT_INT_MASK_1|
- MIPS_INT_MASK_0, /* 8: IPL_{SERIAL,TTY} */
-
- MIPS_SOFT_INT_MASK_0|
- MIPS_SOFT_INT_MASK_1|
- MIPS_INT_MASK_0|
-#ifdef ENABLE_AUMAC_HW1
- /* nothing */
-#else
- MIPS_INT_MASK_1| /* XXX */
-#endif
- MIPS_INT_MASK_2|
- MIPS_INT_MASK_3|
- MIPS_INT_MASK_4|
- MIPS_INT_MASK_5, /* 9: IPL_{CLOCK,HIGH} */
+ MIPS_INT_MASK_0, /* 7: IPL_{SERIAL,TTY} */
MIPS_SOFT_INT_MASK_0|
MIPS_SOFT_INT_MASK_1|
@@ -131,7 +96,7 @@
MIPS_INT_MASK_2|
MIPS_INT_MASK_3|
MIPS_INT_MASK_4|
- MIPS_INT_MASK_5, /* 10: IPL_EXTREME */
+ MIPS_INT_MASK_5, /* 8: IPL_{CLOCK,HIGH} */
};
/*
@@ -287,11 +252,7 @@
* XXX do we want a separate list (really, should only be one item, not
* a list anyway) per irq, not per cpu interrupt?
*/
-#ifdef ENABLE_AUMAC_HW1
- cpu_intr = (irq < 32 ? 0 : 2) + req;
-#else
cpu_intr = (irq < 32 ? 0 : 2);
-#endif
LIST_INSERT_HEAD(&au1000_cpuintrs[cpu_intr].cintr_list, ih, ih_q);
/*
diff -r 4a0eb1335301 -r 282c89017f09 sys/arch/mips/alchemy/dev/if_aumac.c
--- a/sys/arch/mips/alchemy/dev/if_aumac.c Mon Jul 29 16:22:55 2002 +0000
+++ b/sys/arch/mips/alchemy/dev/if_aumac.c Mon Jul 29 16:25:02 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_aumac.c,v 1.1 2002/07/29 15:39:14 simonb Exp $ */
+/* $NetBSD: if_aumac.c,v 1.2 2002/07/29 16:25:03 simonb Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -46,7 +46,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_aumac.c,v 1.1 2002/07/29 15:39:14 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_aumac.c,v 1.2 2002/07/29 16:25:03 simonb Exp $");
#include "bpfilter.h"
@@ -278,7 +278,7 @@
aumac_powerdown(sc);
/* Hook up the interrupt handler. */
- sc->sc_ih = au_intr_establish(aa->aa_irq[0], 1, IPL_AUMAC, IST_LEVEL,
+ sc->sc_ih = au_intr_establish(aa->aa_irq[0], 1, IPL_NET, IST_LEVEL,
aumac_intr, sc);
if (sc->sc_ih == NULL) {
printf("%s: unable to register interrupt handler\n",
Home |
Main Index |
Thread Index |
Old Index