[src/trunk]: src/sys/dev/vme Move some logic from dma_start() to dma_setup(); ...

[pk <pk%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/dd814b1ed8b0
branches:  trunk
changeset: 514846:dd814b1ed8b0
user:      pk <pk%NetBSD.org@localhost>
date:      Tue Sep 11 07:03:56 2001 +0000

description:
Move some logic from dma_start() to dma_setup(); inspired by the sun3 si version.

diffstat:

 sys/dev/vme/si.c |  122 +++++++++++++++++++++++++++---------------------------
 1 files changed, 61 insertions(+), 61 deletions(-)

diffs (180 lines):

diff -r 19414de8c38d -r dd814b1ed8b0 sys/dev/vme/si.c
--- a/sys/dev/vme/si.c  Tue Sep 11 07:00:19 2001 +0000
+++ b/sys/dev/vme/si.c  Tue Sep 11 07:03:56 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: si.c,v 1.4 2001/08/20 12:00:53 wiz Exp $       */
+/*     $NetBSD: si.c,v 1.5 2001/09/11 07:03:56 pk Exp $        */
 
 /*-
  * Copyright (c) 1996,2000 The NetBSD Foundation, Inc.
@@ -628,8 +628,15 @@
 {
        u_int16_t csr;
 
-       si_dma_setup(ncr_sc);
+       /* Clear DMA start address and counters */
+       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, 0);
+       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, 0);
+       SIREG_WRITE(ncr_sc, SIREG_DMA_CNTH, 0);
+       SIREG_WRITE(ncr_sc, SIREG_DMA_CNTL, 0);
+
+       /* Enter receive mode (for safety) and enable DMA engine */
        csr = SIREG_READ(ncr_sc, SIREG_CSR);
+       csr &= ~SI_CSR_SEND;
        csr |= SI_CSR_DMA_EN;
        SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
 }
@@ -665,26 +672,66 @@
 si_dma_setup(ncr_sc)
        struct ncr5380_softc *ncr_sc;
 {
+       struct si_softc *sc = (struct si_softc *)ncr_sc;
+       struct sci_req *sr = ncr_sc->sc_current;
+       struct si_dma_handle *dh = sr->sr_dma_hand;
        u_int16_t csr;
+       u_long dva;
+       int xlen;
+
+       /*
+        * Set up the DMA controller.
+        * Note that (dh->dh_len < sc_datalen)
+        */
 
        csr = SIREG_READ(ncr_sc, SIREG_CSR);
 
+       /* Disable DMA while we're setting up the transfer */
+       csr &= ~SI_CSR_DMA_EN;
+
        /* Reset the FIFO */
        csr &= ~SI_CSR_FIFO_RES;                /* active low */
        SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
        csr |= SI_CSR_FIFO_RES;
        SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
 
-       /* Set direction (assume recv here) */
-       csr &= ~SI_CSR_SEND;
-       SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
-       /* Assume worst alignment */
-       csr |= SI_CSR_BPCON;
+       /*
+        * Get the DVMA mapping for this segment.
+        */
+       dva = (u_long)(dh->dh_dvma);
+       if (dva & 1)
+               panic("si_dma_setup: bad dmaaddr=0x%lx", dva);
+       xlen = ncr_sc->sc_datalen;
+       xlen &= ~1;
+       sc->sc_xlen = xlen;     /* XXX: or less... */
+
+#ifdef DEBUG
+       if (si_debug & 2) {
+               printf("si_dma_start: dh=%p, dmaaddr=0x%lx, xlen=%d\n",
+                          dh, dva, xlen);
+       }
+#endif
+       /* Set direction (send/recv) */
+       if (dh->dh_flags & SIDH_OUT) {
+               csr |= SI_CSR_SEND;
+       } else {
+               csr &= ~SI_CSR_SEND;
+       }
+
+       /* Set byte-packing control */
+       if (dva & 2) {
+               csr |= SI_CSR_BPCON;
+       } else {
+               csr &= ~SI_CSR_BPCON;
+       }
+
        SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
 
-       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, 0);
-       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, 0);
+       /* Load start address */
+       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, (u_int16_t)(dva >> 16));
+       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, (u_int16_t)(dva & 0xFFFF));
 
+       /* Clear DMA counters; these will be set in si_dma_start() */
        SIREG_WRITE(ncr_sc, SIREG_DMA_CNTH, 0);
        SIREG_WRITE(ncr_sc, SIREG_DMA_CNTL, 0);
 
@@ -701,61 +748,13 @@
        struct si_softc *sc = (struct si_softc *)ncr_sc;
        struct sci_req *sr = ncr_sc->sc_current;
        struct si_dma_handle *dh = sr->sr_dma_hand;
-       u_long dva;
        int xlen;
        u_int mode;
        u_int16_t csr;
 
-       /*
-        * Get the DVMA mapping for this segment.
-        */
-       dva = (u_long)(dh->dh_dvma);
-       if (dva & 1)
-               panic("si_dma_start: bad dmaaddr=0x%lx", dva);
-       xlen = ncr_sc->sc_datalen;
-       xlen &= ~1;
-       sc->sc_xlen = xlen;     /* XXX: or less... */
-
-#ifdef DEBUG
-       if (si_debug & 2) {
-               printf("si_dma_start: dh=%p, dmaaddr=0x%lx, xlen=%d\n",
-                          dh, dva, xlen);
-       }
-#endif
-
-       /*
-        * Set up the DMA controller.
-        * Note that (dh->dh_len < sc_datalen)
-        */
-
-       csr = SIREG_READ(ncr_sc, SIREG_CSR);
+       xlen = sc->sc_xlen;
 
-       /* Disable DMA while we're setting up the transfer */
-       csr &= ~SI_CSR_DMA_EN;
-
-       /* Reset FIFO (again?) */
-       csr &= ~SI_CSR_FIFO_RES;                /* active low */
-       SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
-       csr |= SI_CSR_FIFO_RES;
-       SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
-
-       /* Set direction (send/recv) */
-       if (dh->dh_flags & SIDH_OUT) {
-               csr |= SI_CSR_SEND;
-       } else {
-               csr &= ~SI_CSR_SEND;
-       }
-       SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
-
-       if (dva & 2) {
-               csr |= SI_CSR_BPCON;
-       } else {
-               csr &= ~SI_CSR_BPCON;
-       }
-       SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
-
-       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, (u_int16_t)(dva >> 16));
-       SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, (u_int16_t)(dva & 0xFFFF));
+       /* Load transfer length */
        SIREG_WRITE(ncr_sc, SIREG_DMA_CNTH, (u_int16_t)(xlen >> 16));
        SIREG_WRITE(ncr_sc, SIREG_DMA_CNTL, (u_int16_t)(xlen & 0xFFFF));
        SIREG_WRITE(ncr_sc, SIREG_FIFO_CNTH, (u_int16_t)(xlen >> 16));
@@ -787,12 +786,13 @@
                NCR5380_WRITE(ncr_sc, sci_irecv, 0); /* start it */
        }
 
+       ncr_sc->sc_state |= NCR_DOINGDMA;
+
        /* Enable DMA engine */
+       csr = SIREG_READ(ncr_sc, SIREG_CSR);
        csr |= SI_CSR_DMA_EN;
        SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
 
-       ncr_sc->sc_state |= NCR_DOINGDMA;
-
 #ifdef DEBUG
        if (si_debug & 2) {
                printf("si_dma_start: started, flags=0x%x\n",