[src/trunk]: src/sys/dev/scsipi Define more caching parameters from SCSI-3.

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/88353a968be8
branches:  trunk
changeset: 514472:88353a968be8
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Mon Sep 03 17:14:49 2001 +0000

description:
Define more caching parameters from SCSI-3.

diffstat:

 sys/dev/scsipi/scsi_disk.h |  17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diffs (37 lines):

diff -r 320996031eed -r 88353a968be8 sys/dev/scsipi/scsi_disk.h
--- a/sys/dev/scsipi/scsi_disk.h        Mon Sep 03 17:05:20 2001 +0000
+++ b/sys/dev/scsipi/scsi_disk.h        Mon Sep 03 17:14:49 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: scsi_disk.h,v 1.19 2001/09/02 16:47:45 thorpej Exp $   */
+/*     $NetBSD: scsi_disk.h,v 1.20 2001/09/03 17:14:49 thorpej Exp $   */
 
 /*
  * SCSI-specific interface description
@@ -272,6 +272,11 @@
 #define        CACHING_RCD     0x01            /* read cache disable */
 #define        CACHING_MF      0x02            /* multiplcation factor */
 #define        CACHING_WCE     0x04            /* write cache enable (write-back) */
+#define        CACHING_SIZE    0x08            /* use CACHE SEGMENT SIZE */
+#define        CACHING_DISC    0x10            /* pftch across time discontinuities */
+#define        CACHING_CAP     0x20            /* caching analysis permitted */
+#define        CACHING_ABPF    0x40            /* abort prefetch */
+#define        CACHING_IC      0x80            /* initiator control */
                u_int8_t ret_prio;      /* retention priority */
 #define        READ_RET_PRIO_SHIFT 4
 #define        RET_PRIO_DONT_DISTINGUISH       0x0
@@ -281,5 +286,15 @@
                u_int8_t min_prefetch[2];
                u_int8_t max_prefetch[2];
                u_int8_t max_prefetch_ceiling[2];
+               u_int8_t flags2;        /* additional cache param flags */
+#define        CACHING2_VS0    0x08            /* vendor specific bit */
+#define        CACHING2_VS1    0x10            /* vendor specific bit */
+#define        CACHING2_DRA    0x20            /* disable read ahead */
+#define        CACHING2_LBCSS  0x40            /* CACHE SEGMENT SIZE is blocks */
+#define        CACHING2_FSW    0x80            /* force sequential write */
+               u_int8_t num_cache_segments;
+               u_int8_t cache_segment_size[2];
+               u_int8_t reserved1;
+               u_int8_t non_cache_segment_size[2];
        } caching_params;
 };