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[src/trunk]: src/gnu/dist/toolchain/gcc/config/arm * Add -march=armv5, -march...



details:   https://anonhg.NetBSD.org/src/rev/407169043a7d
branches:  trunk
changeset: 534943:407169043a7d
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Wed Aug 07 03:27:39 2002 +0000

description:
* Add -march=armv5, -march=armv5t, -march=armv5te, which are internally
  treated like -march=armv4t, but which generate __ARM_ARCH_5__,
  __ARM_ARCH_5T__, and __ARM_ARCH_5TE__ defines, respecitively.
* Add -mcpu=xscale, which is internally treated like -mcpu=strongarm,
  but which generates __ARM_ARCH_5TE__ and __XSCALE__ defines.

These command-line options and definitions are consistent with gcc 3.x,
and allow NetBSD Makefiles to use them in a forward-compatible way, and
also give hand-tuned source code (e.g. assembly) a chance of tuning for
XScale.

diffstat:

 gnu/dist/toolchain/gcc/config/arm/arm.c |  30 ++++++++++++++++++++++++++++++
 gnu/dist/toolchain/gcc/config/arm/arm.h |   6 ++++++
 2 files changed, 36 insertions(+), 0 deletions(-)

diffs (70 lines):

diff -r 1e6c0e6c1d09 -r 407169043a7d gnu/dist/toolchain/gcc/config/arm/arm.c
--- a/gnu/dist/toolchain/gcc/config/arm/arm.c   Wed Aug 07 02:50:22 2002 +0000
+++ b/gnu/dist/toolchain/gcc/config/arm/arm.c   Wed Aug 07 03:27:39 2002 +0000
@@ -220,6 +220,22 @@
   {"strongarm",                     FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 |            FL_LDSCHED | FL_STRONG },
   {"strongarm110",           FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 |            FL_LDSCHED | FL_STRONG },
   {"strongarm1100",          FL_MODE26 | FL_MODE32 | FL_FAST_MULT | FL_ARCH4 |            FL_LDSCHED | FL_STRONG },
+
+  /* Local NetBSD additions.  These switches also appear in gcc 3.x.  They
+     have been added to the NetBSD in-tree 2.95.3 in order to provide for
+     command-line compatibility with gcc 3.x.
+
+     We treat them like other CPUs that 2.95.3 already supports:
+
+     arm10tdmi -> arm9tdmi
+     arm1020t -> arm9tdmi
+
+     xscame -> strongarm
+
+     --thorpej%netbsd.org@localhost  */
+  {"arm10tdmi",                                 FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED },
+  {"arm1020t",                          FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED },
+  {"xscale",                            FL_MODE32 | FL_FAST_MULT | FL_ARCH4 |            FL_LDSCHED | FL_STRONG },
   
   {NULL, 0}
 };
@@ -236,6 +252,20 @@
   /* Strictly, FL_MODE26 is a permitted option for v4t, but there are no
      implementations that support it, so we will leave it out for now.  */
   {"armv4t",    FL_CO_PROC |             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
+  /* Local NetBSD additions.  These switches also appear in gcc 3.x.  They
+     have been added to the NetBSD in-tree 2.95.3 in order to provide for
+     command-line compatibility with gcc 3.x.
+
+     We treat them like other ARCHs that 2.95.3 already supports:
+
+     armv5 -> armv4t
+     armv5t -> armv4t
+     armv5te -> armv4t
+
+     --thorpej%netbsd.org@localhost  */
+  {"armv5",    FL_CO_PROC |             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
+  {"armv5t",   FL_CO_PROC |             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
+  {"armv5te",  FL_CO_PROC |             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB },
   {NULL, 0}
 };
 
diff -r 1e6c0e6c1d09 -r 407169043a7d gnu/dist/toolchain/gcc/config/arm/arm.h
--- a/gnu/dist/toolchain/gcc/config/arm/arm.h   Wed Aug 07 02:50:22 2002 +0000
+++ b/gnu/dist/toolchain/gcc/config/arm/arm.h   Wed Aug 07 03:27:39 2002 +0000
@@ -152,6 +152,10 @@
 %{march=armv3m:-D__ARM_ARCH_3M__} \
 %{march=armv4:-D__ARM_ARCH_4__} \
 %{march=armv4t:-D__ARM_ARCH_4T__} \
+%{march=armv5:-D__ARM_ARCH_5__} \
+%{march=armv5t:-D__ARM_ARCH_5T__} \
+%{march=armv5e:-D__ARM_ARCH_5E__} \
+%{march=armv5te:-D__ARM_ARCH_5TE__} \
 %{!march=*: \
  %{mcpu=arm2:-D__ARM_ARCH_2__} \
  %{mcpu=arm250:-D__ARM_ARCH_2__} \
@@ -176,6 +180,8 @@
  %{mcpu=strongarm:-D__ARM_ARCH_4__} \
  %{mcpu=strongarm110:-D__ARM_ARCH_4__} \
  %{mcpu=strongarm1100:-D__ARM_ARCH_4__} \
+ %{mcpu=xscale:-D__ARM_ARCH_5TE__} \
+ %{mcpu=xscale:-D__XSCALE__} \
  %{!mcpu*:%(cpp_cpu_arch_default)}} \
 "
 



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