[src/trunk]: src/sys/arch/atari Adapt these for use on the Milan.

[leo <leo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e8de0f9fa6ad
branches:  trunk
changeset: 508417:e8de0f9fa6ad
user:      leo <leo%NetBSD.org@localhost>
date:      Wed Apr 11 14:45:07 2001 +0000

description:
Adapt these for use on the Milan.

diffstat:

 sys/arch/atari/dev/ser.c     |  21 +++++++++++++-
 sys/arch/atari/include/mfp.h |  60 ++++++++++++++++++++++++-------------------
 2 files changed, 53 insertions(+), 28 deletions(-)

diffs (127 lines):

diff -r d0eb2ca1f426 -r e8de0f9fa6ad sys/arch/atari/dev/ser.c
--- a/sys/arch/atari/dev/ser.c  Wed Apr 11 14:44:55 2001 +0000
+++ b/sys/arch/atari/dev/ser.c  Wed Apr 11 14:45:07 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ser.c,v 1.12 2000/11/02 00:32:52 eeh Exp $     */
+/*     $NetBSD: ser.c,v 1.13 2001/04/11 14:45:07 leo Exp $     */
 
 /*-
  * Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -104,6 +104,7 @@
  */
 
 #include "opt_ddb.h"
+#include "opt_mbtype.h"
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -125,8 +126,24 @@
 #include <machine/iomap.h>
 #include <machine/mfp.h>
 #include <atari/atari/intr.h>
+#include <atari/dev/serreg.h>
+
+#if !defined(_MILANHW_)
 #include <atari/dev/ym2149reg.h>
-#include <atari/dev/serreg.h>
+#else
+       /* MILAN has no ym2149 */
+#define ym2149_dtr(set) {                                      \
+       if (set)                                                \
+               single_inst_bset_b(MFP->mf_gpip, 0x08);         \
+       else single_inst_bclr_b(MFP->mf_gpip, 0x08);            \
+}
+
+#define ym2149_rts(set) {                                      \
+       if (set)                                                \
+               single_inst_bset_b(MFP->mf_gpip, 0x01);         \
+       else single_inst_bclr_b(MFP->mf_gpip, 0x01);            \
+}
+#endif /* _MILANHW_ */
 
 /* #define SER_DEBUG */
 
diff -r d0eb2ca1f426 -r e8de0f9fa6ad sys/arch/atari/include/mfp.h
--- a/sys/arch/atari/include/mfp.h      Wed Apr 11 14:44:55 2001 +0000
+++ b/sys/arch/atari/include/mfp.h      Wed Apr 11 14:45:07 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mfp.h,v 1.3 1997/07/15 08:26:08 leo Exp $      */
+/*     $NetBSD: mfp.h,v 1.4 2001/04/11 14:45:07 leo Exp $      */
 
 /*
  * Copyright (c) 1995 Leo Weppelman.
@@ -32,6 +32,7 @@
 
 #ifndef _MACHINE_MFP_H
 #define _MACHINE_MFP_H
+
 /*
  * Atari TT hardware: MFP1/MFP2
  * Motorola 68901 Multi-Function Peripheral
@@ -40,34 +41,41 @@
 #define        MFP     ((struct mfp *)AD_MFP)
 #define        MFP2    ((struct mfp *)AD_MFP2)
 
+#ifdef _MILANHW_
+#define                __MR(n)                 (3 + (4 * n))
+#endif
+#ifdef _ATARIHW_
+#define                __MR(n)                 (1 + (2 * n))
+#endif
+
 struct mfp {
-       volatile u_char mfb[48];        /* use only the odd bytes */
+       volatile u_char mfb[__MR(24)-1];        /* Sparse       */
 };
 
-#define        mf_gpip         mfb[ 1] /* general purpose I/O interrupt port   */
-#define        mf_aer          mfb[ 3] /* active edge register                 */
-#define        mf_ddr          mfb[ 5] /* data direction register              */
-#define        mf_iera         mfb[ 7] /* interrupt enable register A          */
-#define        mf_ierb         mfb[ 9] /* interrupt enable register B          */
-#define        mf_ipra         mfb[11] /* interrupt pending register A         */
-#define        mf_iprb         mfb[13] /* interrupt pending register B         */
-#define        mf_isra         mfb[15] /* interrupt in-service register A      */
-#define        mf_isrb         mfb[17] /* interrupt in-service register B      */
-#define        mf_imra         mfb[19] /* interrupt mask register A            */
-#define        mf_imrb         mfb[21] /* interrupt mask register B            */
-#define        mf_vr           mfb[23] /* vector register                      */
-#define        mf_tacr         mfb[25] /* timer control register A             */
-#define        mf_tbcr         mfb[27] /* timer control register B             */
-#define        mf_tcdcr        mfb[29] /* timer control register C+D           */
-#define        mf_tadr         mfb[31] /* timer data register A                */
-#define        mf_tbdr         mfb[33] /* timer data register B                */
-#define        mf_tcdr         mfb[35] /* timer data register C                */
-#define        mf_tddr         mfb[37] /* timer data register D                */
-#define        mf_scr          mfb[39] /* synchronous character register       */
-#define        mf_ucr          mfb[41] /* USART control register               */
-#define        mf_rsr          mfb[43] /* receiver status register             */
-#define        mf_tsr          mfb[45] /* transmitter status register          */
-#define        mf_udr          mfb[47] /* USART data register                  */
+#define        mf_gpip     mfb[__MR(0) ]    /* gen-purp I/O interrupt port     */
+#define        mf_aer      mfb[__MR(1) ]    /* active edge register            */
+#define        mf_ddr      mfb[__MR(2) ]    /* data direction register         */
+#define        mf_iera     mfb[__MR(3) ]    /* interrupt enable register A     */
+#define        mf_ierb     mfb[__MR(4) ]    /* interrupt enable register B     */
+#define        mf_ipra     mfb[__MR(5) ]    /* interrupt pending register A    */
+#define        mf_iprb     mfb[__MR(6) ]    /* interrupt pending register B    */
+#define        mf_isra     mfb[__MR(7) ]    /* interrupt in-service register A */
+#define        mf_isrb     mfb[__MR(8) ]    /* interrupt in-service register B */
+#define        mf_imra     mfb[__MR(9) ]    /* interrupt mask register A       */
+#define        mf_imrb     mfb[__MR(10)]    /* interrupt mask register B       */
+#define        mf_vr       mfb[__MR(11)]    /* vector register                 */
+#define        mf_tacr     mfb[__MR(12)]    /* timer control register A        */
+#define        mf_tbcr     mfb[__MR(13)]    /* timer control register B        */
+#define        mf_tcdcr    mfb[__MR(14)]    /* timer control register C+D      */
+#define        mf_tadr     mfb[__MR(15)]    /* timer data register A           */
+#define        mf_tbdr     mfb[__MR(16)]    /* timer data register B           */
+#define        mf_tcdr     mfb[__MR(17)]    /* timer data register C           */
+#define        mf_tddr     mfb[__MR(18)]    /* timer data register D           */
+#define        mf_scr      mfb[__MR(19)]    /* synchronous character register  */
+#define        mf_ucr      mfb[__MR(20)]    /* USART control register          */
+#define        mf_rsr      mfb[__MR(21)]    /* receiver status register        */
+#define        mf_tsr      mfb[__MR(22)]    /* transmitter status register     */
+#define        mf_udr      mfb[__MR(23)]    /* USART data register             */
 
 /* names of IO port bits: */
 #define        IO_PBSY         0x01    /* Parallel Busy                        */