[src/trunk]: src/sys/dev/pci Bugfix: reset 16-bit pcmcia in chip initialisati...

[haya <haya%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ee9dc9d4e873
branches:  trunk
changeset: 498452:ee9dc9d4e873
user:      haya <haya%NetBSD.org@localhost>
date:      Wed Oct 25 09:15:58 2000 +0000

description:
Bugfix: reset 16-bit pcmcia in chip initialisation sequence.

diffstat:

 sys/dev/pci/pccbb.c |  14 ++++++++++++--
 1 files changed, 12 insertions(+), 2 deletions(-)

diffs (42 lines):

diff -r a7d0723bf721 -r ee9dc9d4e873 sys/dev/pci/pccbb.c
--- a/sys/dev/pci/pccbb.c       Wed Oct 25 03:50:32 2000 +0000
+++ b/sys/dev/pci/pccbb.c       Wed Oct 25 09:15:58 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pccbb.c,v 1.45 2000/08/28 09:26:38 haya Exp $  */
+/*     $NetBSD: pccbb.c,v 1.46 2000/10/25 09:15:58 haya Exp $  */
 
 /*
  * Copyright (c) 1998, 1999 and 2000
@@ -745,6 +745,7 @@
        reg = pci_conf_read(pc, tag, PCI_BCR_INTR);
        reg &= ~CB_BCR_INTR_IREQ_ENABLE;        /* use PCI Intr */
        reg |= CB_BCR_WRITE_POST_ENABLE;        /* enable write post */
+       reg |= CB_BCR_RESET_ENABLE;             /* assert reset */
        pci_conf_write(pc, tag, PCI_BCR_INTR, reg);
 
        switch (sc->sc_chipset) {
@@ -785,6 +786,15 @@
        pci_conf_write(pc, tag, PCI_CB_IOLIMIT0, 0);
        pci_conf_write(pc, tag, PCI_CB_IOBASE1, 0xffffffff);
        pci_conf_write(pc, tag, PCI_CB_IOLIMIT1, 0);
+
+       /* reset 16-bit pcmcia bus */
+       bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
+           0x800 + PCIC_INTR,
+           bus_space_read_1(sc->sc_base_memt, sc->sc_base_memh,
+               0x800 + PCIC_INTR) & ~PCIC_INTR_RESET);
+
+       /* turn of power */
+       pccbb_power((cardbus_chipset_tag_t)sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
 }
 
 
@@ -829,7 +839,7 @@
         *    needs that while in PCMCIA mode.
         * 4) Clear any pending CSC interrupt.
         */
-       Pcic_write(ph, PCIC_INTR, PCIC_INTR_ENABLE | PCIC_INTR_RESET);
+       Pcic_write(ph, PCIC_INTR, PCIC_INTR_ENABLE);
        if (sc->sc_chipset == CB_TI113X) {
                Pcic_write(ph, PCIC_CSC_INTR, 0);
        } else {