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[src/trunk]: src/sys/arch Do a straight and simple cpu identification in cpu_...
details: https://anonhg.NetBSD.org/src/rev/ce7365f861f2
branches: trunk
changeset: 511798:ce7365f861f2
user: nisimura <nisimura%NetBSD.org@localhost>
date: Wed Jun 27 08:20:44 2001 +0000
description:
Do a straight and simple cpu identification in cpu_attach().
diffstat:
sys/arch/mipsco/mipsco/cpu.c | 37 +++++++++++++++++++++-
sys/arch/newsmips/newsmips/cpu.c | 54 ++++++++++++++++++++++++++++++++-
sys/arch/pmax/pmax/cpu.c | 63 ++++++++++++++++++++++++++++++++++++++-
3 files changed, 145 insertions(+), 9 deletions(-)
diffs (215 lines):
diff -r ca365905943b -r ce7365f861f2 sys/arch/mipsco/mipsco/cpu.c
--- a/sys/arch/mipsco/mipsco/cpu.c Wed Jun 27 05:17:32 2001 +0000
+++ b/sys/arch/mipsco/mipsco/cpu.c Wed Jun 27 08:20:44 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.1 2000/08/12 22:58:52 wdk Exp $ */
+/* $NetBSD: cpu.c,v 1.2 2001/06/27 08:20:44 nisimura Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -34,6 +34,8 @@
#include <machine/cpu.h>
#include <machine/autoconf.h>
+#include <mips/locore.h>
+
/* Definition of the driver for autoconfig. */
static int cpumatch(struct device *, struct cfdata *, void *);
static void cpuattach(struct device *, struct device *, void *);
@@ -67,8 +69,37 @@
struct device *dev;
void *aux;
{
+ char *cpu_name, *fpu_name;
- printf(": ");
+ printf("\n");
+ switch (MIPS_PRID_IMPL(cpu_id)) {
+ case MIPS_R2000:
+ cpu_name = "MIPS R2000 CPU";
+ break;
+ case MIPS_R3000:
+ cpu_name = "MIPS R3000 CPU";
+ break;
+ default:
+ cpu_name = "Unknown CPU";
+ }
- cpu_identify();
+ switch (MIPS_PRID_IMPL(fpu_id)) {
+ case MIPS_R2360:
+ fpu_name = "MIPS R2360 Floating Point Board";
+ break;
+ case MIPS_R2010:
+ fpu_name = "MIPS R2010 FPA";
+ break;
+ case MIPS_R3010:
+ fpu_name = "MIPS R3010 FPA";
+ break;
+ default:
+ fpu_name = "unknown FPA";
+ break;
+ }
+ printf("%s: %s (0x%04x) with %s (0x%04x)\n",
+ dev->dv_xname, cpu_name, cpu_id, fpu_name, fpu_id);
+ printf("%s: ", dev->dv_xname);
+ printf("%dKB Instruction, %dKB Data, direct mapped cache\n",
+ mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
}
diff -r ca365905943b -r ce7365f861f2 sys/arch/newsmips/newsmips/cpu.c
--- a/sys/arch/newsmips/newsmips/cpu.c Wed Jun 27 05:17:32 2001 +0000
+++ b/sys/arch/newsmips/newsmips/cpu.c Wed Jun 27 08:20:44 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.3 2000/02/19 03:59:04 mycroft Exp $ */
+/* $NetBSD: cpu.c,v 1.4 2001/06/27 08:20:45 nisimura Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -31,6 +31,8 @@
#include <sys/device.h>
#include <sys/systm.h>
+#include <mips/locore.h>
+
#include <machine/cpu.h>
#include <machine/autoconf.h>
@@ -65,7 +67,53 @@
struct device *dev;
void *aux;
{
+ char *cpu_name, *fpu_name;
- printf(": ");
- cpu_identify();
+ printf("\n");
+ switch (MIPS_PRID_IMPL(cpu_id)) {
+ case MIPS_R3000:
+ cpu_name = "MIPS R3000 CPU";
+ break;
+ case MIPS_R4000:
+ cpu_name = "MIPS R4000 CPU";
+ break;
+ default:
+ cpu_name = "Unknown CPU";
+ }
+ if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4000
+ && mips_L1ICacheSize == 16384)
+ cpu_name = "MIPS R4400 CPU";
+
+ switch (MIPS_PRID_IMPL(fpu_id)) {
+ case MIPS_R3010:
+ fpu_name = "MIPS R3010 FPA";
+ break;
+ case MIPS_R4010:
+ fpu_name = "MIPS R4010 FPA";
+ break;
+ default:
+ fpu_name = "unknown FPA";
+ break;
+ }
+ printf("%s: %s (0x%04x) with %s (0x%04x)\n",
+ dev->dv_xname, cpu_name, cpu_id, fpu_name, fpu_id);
+ if (MIPS_PRID_IMPL(cpu_id) != MIPS_R4000) {
+ printf("%s: ", dev->dv_xname);
+ printf("%dKB Instruction, %dKB Data, direct mapped cache\n",
+ mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+ }
+ else {
+ printf("%s: L1 cache: ", dev->dv_xname);
+ printf("%dKB Instruction, %dKB Data, direct mapped\n",
+ mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+ printf("%s: ", dev->dv_xname);
+
+ if (!mips_L2CachePresent)
+ printf("no L2 cache\n");
+ else
+ printf("L2 cache: %dKB/%dB %s, %s\n",
+ mips_L2CacheSize/1024, mips_L2CacheLSize,
+ mips_L2CacheMixed ? "mixed" : "separated",
+ mips_L2CacheIsSnooping? "snooping" : "no snooping");
+ }
}
diff -r ca365905943b -r ce7365f861f2 sys/arch/pmax/pmax/cpu.c
--- a/sys/arch/pmax/pmax/cpu.c Wed Jun 27 05:17:32 2001 +0000
+++ b/sys/arch/pmax/pmax/cpu.c Wed Jun 27 08:20:44 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.17 2000/02/19 03:59:05 mycroft Exp $ */
+/* $NetBSD: cpu.c,v 1.18 2001/06/27 08:20:45 nisimura Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -31,6 +31,8 @@
#include <sys/device.h>
#include <sys/systm.h>
+#include <mips/locore.h>
+
#include <machine/autoconf.h>
static int cpumatch __P((struct device *, struct cfdata *, void *));
@@ -61,7 +63,62 @@
struct device *parent, *dev;
void *aux;
{
+ char *cpu_name, *fpu_name;
- printf(": ");
- cpu_identify();
+ printf("\n");
+ switch (MIPS_PRID_IMPL(cpu_id)) {
+ case MIPS_R2000:
+ cpu_name = "MIPS R2000 CPU";
+ break;
+ case MIPS_R3000:
+ cpu_name = "MIPS R3000 CPU";
+ break;
+ case MIPS_R4000:
+ cpu_name = "MIPS R4000 CPU";
+ break;
+ default:
+ cpu_name = "Unknown CPU";
+ }
+ if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4000
+ && mips_L1ICacheSize == 16384)
+ cpu_name = "MIPS R4400 CPU";
+
+ switch (MIPS_PRID_IMPL(fpu_id)) {
+ case MIPS_R2360:
+ fpu_name = "MIPS R2360 Floating Point Board";
+ break;
+ case MIPS_R2010:
+ fpu_name = "MIPS R2010 FPA";
+ break;
+ case MIPS_R3010:
+ fpu_name = "MIPS R3010 FPA";
+ break;
+ case MIPS_R4010:
+ fpu_name = "MIPS R4010 FPA";
+ break;
+ default:
+ fpu_name = "unknown FPA";
+ break;
+ }
+ printf("%s: %s (0x%04x) with %s (0x%04x)\n",
+ dev->dv_xname, cpu_name, cpu_id, fpu_name, fpu_id);
+ if (MIPS_PRID_IMPL(cpu_id) != MIPS_R4000) {
+ printf("%s: ", dev->dv_xname);
+ printf("%dKB Instruction, %dKB Data, direct mapped cache\n",
+ mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+ }
+ else {
+ printf("%s: L1 cache: ", dev->dv_xname);
+ printf("%dKB Instruction, %dKB Data, direct mapped\n",
+ mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+ printf("%s: ", dev->dv_xname);
+
+ if (!mips_L2CachePresent)
+ printf("no L2 cache\n");
+ else
+ printf("L2 cache: %dKB/%dB %s, %s\n",
+ mips_L2CacheSize/1024, mips_L2CacheLSize,
+ mips_L2CacheMixed ? "mixed" : "separated",
+ mips_L2CacheIsSnooping? "snooping" : "no snooping");
+ }
}
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