[src/trunk]: src/sys/arch/arm/arm following Jason's change to _xscale, conver...

[chris <chris%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/3df3a7333edb
branches:  trunk
changeset: 535386:3df3a7333edb
user:      chris <chris%NetBSD.org@localhost>
date:      Sat Aug 17 01:02:38 2002 +0000

description:
following Jason's change to _xscale, convert bpl's to bhi's, saves looping more than needed in some cases.

diffstat:

 sys/arch/arm/arm/cpufunc_asm_sa1.S |  10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diffs (45 lines):

diff -r 66cf08637120 -r 3df3a7333edb sys/arch/arm/arm/cpufunc_asm_sa1.S
--- a/sys/arch/arm/arm/cpufunc_asm_sa1.S        Sat Aug 17 00:01:23 2002 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_sa1.S        Sat Aug 17 01:02:38 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_sa1.S,v 1.6 2002/08/14 23:30:21 thorpej Exp $      */
+/*     $NetBSD: cpufunc_asm_sa1.S,v 1.7 2002/08/17 01:02:38 chris Exp $        */
 
 /*
  * Copyright (c) 1997,1998 Mark Brinicombe.
@@ -224,7 +224,7 @@
 1:     mcr     p15, 0, r0, c7, c10, 1  /* clean D cache entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
        mov     pc, lr
@@ -241,7 +241,7 @@
        mcr     p15, 0, r0, c7, c6, 1   /* flush D cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
        mcr     p15, 0, r0, c7, c5, 0   /* flush I cache */
@@ -259,7 +259,7 @@
        mcr     p15, 0, r0, c7, c6, 1   /* flush D cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
        mov     pc, lr
@@ -275,7 +275,7 @@
 1:     mcr     p15, 0, r0, c7, c10, 1  /* clean D cache entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
        mcr     p15, 0, r0, c7, c5, 0   /* flush I cache */