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[src/trunk]: src/sys/arch/arm/include Inline SetCPSR calls where it seems pru...
details: https://anonhg.NetBSD.org/src/rev/4bd3965b38cb
branches: trunk
changeset: 535318:4bd3965b38cb
user: briggs <briggs%NetBSD.org@localhost>
date: Wed Aug 14 21:55:52 2002 +0000
description:
Inline SetCPSR calls where it seems prudent to do so. This avoids two
branches and allows the compiler to better utilize registers around
calls to disable/enable/restore_interrupts().
diffstat:
sys/arch/arm/include/cpu.h | 14 +++++++-------
sys/arch/arm/include/cpufunc.h | 27 +++++++++++++++++++++++----
sys/arch/arm/include/profile.h | 8 ++++----
3 files changed, 34 insertions(+), 15 deletions(-)
diffs (111 lines):
diff -r 7e1c432735b2 -r 4bd3965b38cb sys/arch/arm/include/cpu.h
--- a/sys/arch/arm/include/cpu.h Wed Aug 14 21:52:36 2002 +0000
+++ b/sys/arch/arm/include/cpu.h Wed Aug 14 21:55:52 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.27 2002/05/08 22:22:46 thorpej Exp $ */
+/* $NetBSD: cpu.h,v 1.28 2002/08/14 21:55:52 briggs Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -92,21 +92,21 @@
#ifdef _LOCORE
#define IRQdisable \
stmfd sp!, {r0} ; \
- mrs r0, cpsr_all ; \
+ mrs r0, cpsr ; \
orr r0, r0, #(I32_bit) ; \
- msr cpsr_all, r0 ; \
+ msr cpsr_c, r0 ; \
ldmfd sp!, {r0}
#define IRQenable \
stmfd sp!, {r0} ; \
- mrs r0, cpsr_all ; \
+ mrs r0, cpsr ; \
bic r0, r0, #(I32_bit) ; \
- msr cpsr_all, r0 ; \
+ msr cpsr_c, r0 ; \
ldmfd sp!, {r0}
#else
-#define IRQdisable SetCPSR(I32_bit, I32_bit);
-#define IRQenable SetCPSR(I32_bit, 0);
+#define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
+#define IRQenable __set_cpsr_c(I32_bit, 0);
#endif /* _LOCORE */
#endif
diff -r 7e1c432735b2 -r 4bd3965b38cb sys/arch/arm/include/cpufunc.h
--- a/sys/arch/arm/include/cpufunc.h Wed Aug 14 21:52:36 2002 +0000
+++ b/sys/arch/arm/include/cpufunc.h Wed Aug 14 21:55:52 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.h,v 1.24 2002/07/15 16:27:16 ichiro Exp $ */
+/* $NetBSD: cpufunc.h,v 1.25 2002/08/14 21:55:52 briggs Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -403,14 +403,33 @@
* Macros for manipulating CPU interrupts
*/
#ifdef __PROG32
+static __inline u_int32_t __set_cpsr_c(u_int bic, u_int eor) __attribute__((__unused__));
+
+static __inline u_int32_t
+__set_cpsr_c(u_int bic, u_int eor)
+{
+ u_int32_t tmp, ret;
+
+ __asm __volatile(
+ "mrs %0, cpsr\n" /* Get the CPSR */
+ "bic %1, %0, %2\n" /* Clear bits */
+ "eor %1, %1, %3\n" /* XOR bits */
+ "msr cpsr_c, %1\n" /* Set the control field of CPSR */
+ : "=&r" (ret), "=&r" (tmp)
+ : "r" (bic), "r" (eor));
+
+ return ret;
+}
+
#define disable_interrupts(mask) \
- (SetCPSR((mask) & (I32_bit | F32_bit), (mask) & (I32_bit | F32_bit)))
+ (__set_cpsr_c((mask) & (I32_bit | F32_bit), \
+ (mask) & (I32_bit | F32_bit)))
#define enable_interrupts(mask) \
- (SetCPSR((mask) & (I32_bit | F32_bit), 0))
+ (__set_cpsr_c((mask) & (I32_bit | F32_bit), 0))
#define restore_interrupts(old_cpsr) \
- (SetCPSR((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
+ (__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
#else /* ! __PROG32 */
#define disable_interrupts(mask) \
(set_r15((mask) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE), \
diff -r 7e1c432735b2 -r 4bd3965b38cb sys/arch/arm/include/profile.h
--- a/sys/arch/arm/include/profile.h Wed Aug 14 21:52:36 2002 +0000
+++ b/sys/arch/arm/include/profile.h Wed Aug 14 21:55:52 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: profile.h,v 1.5 2002/03/24 15:49:40 bjh21 Exp $ */
+/* $NetBSD: profile.h,v 1.6 2002/08/14 21:55:52 briggs Exp $ */
/*
* Copyright (c) 2001 Ben Harris
@@ -87,7 +87,7 @@
__asm__("ldmfd sp!, {r0-r3, lr, pc}");
#ifdef _KERNEL
-#ifdef acorn26
+#ifdef __PROG26
extern int int_off_save(void);
extern void int_restore(int);
#define MCOUNT_ENTER (s = int_off_save())
@@ -100,7 +100,7 @@
*
* We're lucky that the CPSR and 's' both happen to be 'int's.
*/
-#define MCOUNT_ENTER s = SetCPSR(0x0080, 0x0080); /* set IRQ disable bit */
-#define MCOUNT_EXIT SetCPSR(0xffffffff, s); /* restore old value */
+#define MCOUNT_ENTER s = __set_cpsr_c(0x0080, 0x0080); /* kill IRQ */
+#define MCOUNT_EXIT __set_cpsr_c(0xffffffff, s); /* restore old value */
#endif /* !acorn26 */
#endif /* _KERNEL */
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