[src/netbsd-1-6]: src/sys/dev/pci Apply patch (requested by bouyer in ticket ...

[grant <grant%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/aa649a5d6f3f
branches:  netbsd-1-6
changeset: 530313:aa649a5d6f3f
user:      grant <grant%NetBSD.org@localhost>
date:      Mon Jun 16 21:14:31 2003 +0000

description:
Apply patch (requested by bouyer in ticket #1234):

Rework SiS support: more controller supported (up to Ultra/133) and better
support for the older ones.
Information for this work extracted from Soeren Schmidt's FreeBSD driver.

diffstat:

 sys/dev/pci/pciide_sis_reg.h |  73 +++++++++++++++++++++++++++++++++----------
 sys/dev/pci/pciidevar.h      |   5 ++-
 2 files changed, 59 insertions(+), 19 deletions(-)

diffs (111 lines):

diff -r ea6b2d1ff772 -r aa649a5d6f3f sys/dev/pci/pciide_sis_reg.h
--- a/sys/dev/pci/pciide_sis_reg.h      Mon Jun 16 21:13:25 2003 +0000
+++ b/sys/dev/pci/pciide_sis_reg.h      Mon Jun 16 21:14:31 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciide_sis_reg.h,v 1.9 2002/04/23 20:41:18 bouyer Exp $        */
+/*     $NetBSD: pciide_sis_reg.h,v 1.9.4.1 2003/06/16 21:14:31 grant Exp $     */
 
 /*
  * Copyright (c) 1998 Manuel Bouyer.
@@ -36,12 +36,24 @@
  * Available from http://www.sis.com.tw/html/databook.html
  */
 
-/* IDE timing control registers (32 bits) */
+/* IDE timing control registers (32 bits), for all but 96x */
 #define SIS_TIM(channel) (0x40 + (channel * 4))
-#define SIS_TIM_REC_OFF(drive) (16 * (drive))
-#define SIS_TIM_ACT_OFF(drive) (8 + 16 * (drive))
-#define SIS_TIM_UDMA_TIME_OFF(drive) (12 + 16 * (drive))
-#define SIS_TIM_UDMA_EN(drive) (1 << (15 + 16 * (drive)))
+/* for 730, 630 and older (66, 100OLD) */
+#define SIS_TIM66_REC_OFF(drive) (16 * (drive))
+#define SIS_TIM66_ACT_OFF(drive) (8 + 16 * (drive))
+#define SIS_TIM66_UDMA_TIME_OFF(drive) (12 + 16 * (drive))
+/* for older than 96x (100NEW, 133OLD) */
+#define SIS_TIM100_REC_OFF(drive) (16 * (drive))
+#define SIS_TIM100_ACT_OFF(drive) (4 + 16 * (drive))
+#define SIS_TIM100_UDMA_TIME_OFF(drive) (8 + 16 * (drive))
+
+/*
+ * From FreeBSD: on 96x, the timing registers may start from 0x40 or 0x70
+ * depending on the value from register 0x57. 32bits of timing info for
+ * each drive.
+ */
+#define SIS_TIM133(reg57, channel, drive) \
+    ((((reg57) & 0x40) ? 0x70 : 0x40) + ((channel) << 3) + ((drive) << 2))
 
 /* IDE general control register 0 (8 bits) */
 #define SIS_CTRL0 0x4a
@@ -62,15 +74,40 @@
 #define SIS_MISC_GTC           0x04
 #define SIS_MISC_FIFO_SIZE     0x01
 
-static const int8_t sis_pio_act[] __attribute__((__unused__)) =
-    {7, 5, 4, 3, 3};
-static const int8_t sis_pio_rec[] __attribute__((__unused__)) =
-    {7, 0, 5, 3, 1};
-#ifdef unused
-static const int8_t sis_dma_act[] __attribute__((__unused__)) =
-    {0, 3, 3};
-static const int8_t sis_dma_rec[] __attribute__((__unused__)) =
-    {0, 2, 1};
-#endif
-static const int8_t sis_udma_tim[] __attribute__((__unused__)) =
-    {14, 12, 10, 10, 9, 8};
+/* following are from FreeBSD (sorry, no description) */
+#define SIS_REG_49     0x49
+#define SIS_REG_50     0x50
+#define SIS_REG_51     0x51
+#define SIS_REG_52     0x52
+#define SIS_REG_53     0x53
+#define SIS_REG_57     0x57
+
+#define SIS_REG_CBL 0x48
+#define SIS_REG_CBL_33(channel) (0x10 << (channel))
+#define SIS96x_REG_CBL(channel) (0x51 + (channel) * 2)
+#define SIS96x_REG_CBL_33 0x80
+
+#define SIS_PRODUCT_5518 0x5518
+
+/* timings values, mostly from FreeBSD */
+/* PIO timings, for all up to 133NEW */
+static const u_int8_t sis_pio_act[] __attribute__((__unused__)) =
+    {12, 6, 4, 3, 3};
+static const u_int8_t sis_pio_rec[] __attribute__((__unused__)) =
+    {11, 7, 4, 3, 1};
+/* DMA timings for 66 and 100OLD */
+static const u_int8_t sis_udma66_tim[] __attribute__((__unused__)) =
+    {15, 13, 11, 10, 9, 8};
+/* DMA timings for 100NEW */
+static const u_int8_t sis_udma100new_tim[] __attribute__((__unused__)) =
+    {0x8b, 0x87, 0x85, 0x84, 0x82, 0x81};
+/* DMA timings for 133OLD */
+static const u_int8_t sis_udma133old_tim[] __attribute__((__unused__)) =
+    {0x8f, 0x8a, 0x87, 0x85, 0x83, 0x82, 0x81};
+/* PIO, DMA and UDMA timings for 133NEW */
+static const u_int32_t sis_pio133new_tim[] __attribute__((__unused__)) =
+    {0x28269008, 0x0c266008, 0x4263008, 0x0c0a3008, 0x05093008};
+static const u_int32_t sis_dma133new_tim[] __attribute__((__unused__)) =
+    {0x22196008, 0x0c0a3008, 0x05093008};
+static const u_int32_t sis_udma133new_tim[] __attribute__((__unused__)) =
+    {0x9f4, 0x64a, 0x474, 0x254, 0x234, 0x224, 0x214};
diff -r ea6b2d1ff772 -r aa649a5d6f3f sys/dev/pci/pciidevar.h
--- a/sys/dev/pci/pciidevar.h   Mon Jun 16 21:13:25 2003 +0000
+++ b/sys/dev/pci/pciidevar.h   Mon Jun 16 21:14:31 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciidevar.h,v 1.7 2001/06/08 04:48:58 simonb Exp $     */
+/*     $NetBSD: pciidevar.h,v 1.7.16.1 2003/06/16 21:14:47 grant Exp $ */
 
 /*
  * Copyright (c) 1998 Christopher G. Demetriou.  All rights reserved.
@@ -56,6 +56,9 @@
        const struct cy82c693_handle *sc_cy_handle;
        int sc_cy_compatchan;
 
+       /* for SiS */
+       u_int8_t sis_type;
+
        /* Chip description */
        const struct pciide_product_desc *sc_pp;
        /* common definitions */