[src/trunk]: src/sys/arch/arm Handle i80200 step D0 and i80321 step B0

[briggs <briggs%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8f2163bbbe6a
branches:  trunk
changeset: 534351:8f2163bbbe6a
user:      briggs <briggs%NetBSD.org@localhost>
date:      Mon Jul 22 18:17:42 2002 +0000

description:
Handle i80200 step D0 and i80321 step B0

diffstat:

 sys/arch/arm/arm/cpufunc.c    |   5 +++--
 sys/arch/arm/arm32/cpu.c      |  19 +++++++++++++++----
 sys/arch/arm/include/armreg.h |   4 +++-
 3 files changed, 21 insertions(+), 7 deletions(-)

diffs (85 lines):

diff -r 78ff7088453e -r 8f2163bbbe6a sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Mon Jul 22 17:53:26 2002 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Mon Jul 22 18:17:42 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.48 2002/07/15 16:27:15 ichiro Exp $      */
+/*     $NetBSD: cpufunc.c,v 1.49 2002/07/22 18:17:42 briggs Exp $      */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -973,7 +973,8 @@
        }
 #endif /* CPU_XSCALE_80200 */
 #ifdef CPU_XSCALE_80321
-       if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600) {
+       if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 ||
+           cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0) {
                i80321_icu_init();
 
                /*
diff -r 78ff7088453e -r 8f2163bbbe6a sys/arch/arm/arm32/cpu.c
--- a/sys/arch/arm/arm32/cpu.c  Mon Jul 22 17:53:26 2002 +0000
+++ b/sys/arch/arm/arm32/cpu.c  Mon Jul 22 18:17:42 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.39 2002/07/10 07:00:52 ichiro Exp $  */
+/*     $NetBSD: cpu.c,v 1.40 2002/07/22 18:17:42 briggs Exp $  */
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -45,7 +45,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.39 2002/07/10 07:00:52 ichiro Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.40 2002/07/22 18:17:42 briggs Exp $");
 
 #include <sys/systm.h>
 #include <sys/malloc.h>
@@ -210,6 +210,13 @@
 
 static const char *xscale_steppings[16] = {
        "step A-0",     "step A-1",     "step B-0",     "step C-0",
+       "step D-0",     "rev 5",        "rev 6",        "rev 7",
+       "rev 8",        "rev 9",        "rev 10",       "rev 11",
+       "rev 12",       "rev 13",       "rev 14",       "rev 15",
+};
+
+static const char *i80321_steppings[16] = {
+       "step A-0",     "step B-0",     "rev 2",        "rev 3",
        "rev 4",        "rev 5",        "rev 6",        "rev 7",
        "rev 8",        "rev 9",        "rev 10",       "rev 11",
        "rev 12",       "rev 13",       "rev 14",       "rev 15",
@@ -294,9 +301,13 @@
          xscale_steppings },
 
        { CPU_ID_80321_400,     CPU_CLASS_XSCALE,       "i80321 400MHz",
-         xscale_steppings },
+         i80321_steppings },
        { CPU_ID_80321_600,     CPU_CLASS_XSCALE,       "i80321 600MHz",
-         xscale_steppings },
+         i80321_steppings },
+       { CPU_ID_80321_400_B0,  CPU_CLASS_XSCALE,       "i80321 400MHz",
+         i80321_steppings },
+       { CPU_ID_80321_600_B0,  CPU_CLASS_XSCALE,       "i80321 600MHz",
+         i80321_steppings },
 
        { CPU_ID_PXA250A,       CPU_CLASS_XSCALE,       "PXA250(1st ver core)",
          pxa2x0_steppings },
diff -r 78ff7088453e -r 8f2163bbbe6a sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Mon Jul 22 17:53:26 2002 +0000
+++ b/sys/arch/arm/include/armreg.h     Mon Jul 22 18:17:42 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.20 2002/07/10 07:00:52 ichiro Exp $       */
+/*     $NetBSD: armreg.h,v 1.21 2002/07/22 18:17:43 briggs Exp $       */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -195,6 +195,8 @@
 #define CPU_ID_PXA210B         0x69052920 /* 3rd version Core */
 #define        CPU_ID_80321_400        0x69052420
 #define        CPU_ID_80321_600        0x69052430
+#define        CPU_ID_80321_400_B0     0x69052c20
+#define        CPU_ID_80321_600_B0     0x69052c30
 
 /* ARM3-specific coprocessor 15 registers */
 #define ARM3_CP15_FLUSH                1