[src/trunk]: src/sys/arch Use the new arm_dcache_align variable to set the PC...

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/dc145f24e943
branches:  trunk
changeset: 518367:dc145f24e943
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Thu Nov 29 02:26:50 2001 +0000

description:
Use the new arm_dcache_align variable to set the PCI device BHLC
register.

diffstat:

 sys/arch/arm/xscale/i80312_pci.c |  5 ++---
 sys/arch/evbarm/ifpga/ifpga.c    |  9 +++------
 2 files changed, 5 insertions(+), 9 deletions(-)

diffs (42 lines):

diff -r a38c466fc1e2 -r dc145f24e943 sys/arch/arm/xscale/i80312_pci.c
--- a/sys/arch/arm/xscale/i80312_pci.c  Thu Nov 29 02:24:58 2001 +0000
+++ b/sys/arch/arm/xscale/i80312_pci.c  Thu Nov 29 02:26:50 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i80312_pci.c,v 1.4 2001/11/28 23:48:35 thorpej Exp $   */
+/*     $NetBSD: i80312_pci.c,v 1.5 2001/11/29 02:26:50 thorpej Exp $   */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -110,8 +110,7 @@
            M_DEVBUF, NULL, 0, EX_NOWAIT);
 
        printf("%s: configuring Secondary PCI bus\n", sc->sc_dev.dv_xname);
-       /* XXX Magic number; XScale has a 32-byte cache line. */
-       pci_configure_bus(pc, ioext, memext, NULL, sbus, 32);
+       pci_configure_bus(pc, ioext, memext, NULL, sbus, arm_dcache_align);
 
        extent_destroy(ioext);
        extent_destroy(memext);
diff -r a38c466fc1e2 -r dc145f24e943 sys/arch/evbarm/ifpga/ifpga.c
--- a/sys/arch/evbarm/ifpga/ifpga.c     Thu Nov 29 02:24:58 2001 +0000
+++ b/sys/arch/evbarm/ifpga/ifpga.c     Thu Nov 29 02:26:50 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ifpga.c,v 1.3 2001/11/28 23:48:35 thorpej Exp $ */
+/*     $NetBSD: ifpga.c,v 1.4 2001/11/29 02:26:50 thorpej Exp $ */
 
 /*
  * Copyright (c) 2001 ARM Ltd
@@ -319,11 +319,8 @@
            IFPGA_PCI_APP1_BASE + IFPGA_PCI_APP1_SIZE,
            M_DEVBUF, NULL, 0, EX_NOWAIT);
        ifpga_pci_chipset.pc_conf_v = (void *)pci_sc;
-       /*
-        * XXX ARM920T has a 32-byte cache line; should probably fetch
-        * XXX this info from the cache type register.
-        */
-       pci_configure_bus(&ifpga_pci_chipset, ioext, memext, pmemext, 0, 32);
+       pci_configure_bus(&ifpga_pci_chipset, ioext, memext, pmemext, 0,
+           arm_dcache_align);
        extent_destroy(pmemext);
        extent_destroy(memext);
        extent_destroy(ioext);