[src/trunk]: src/sys/arch/hpcarm/sa11x0 Use working bus_space_map.

[toshii <toshii%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e226fab3c762
branches:  trunk
changeset: 504180:e226fab3c762
user:      toshii <toshii%NetBSD.org@localhost>
date:      Sat Feb 24 12:43:52 2001 +0000

description:
Use working bus_space_map.

diffstat:

 sys/arch/hpcarm/sa11x0/sa11x0.c     |   4 +++-
 sys/arch/hpcarm/sa11x0/sa11x0_irq.S |  12 +++++++-----
 sys/arch/hpcarm/sa11x0/sa11x0_reg.h |  32 ++++++++++----------------------
 3 files changed, 20 insertions(+), 28 deletions(-)

diffs (115 lines):

diff -r e23968466505 -r e226fab3c762 sys/arch/hpcarm/sa11x0/sa11x0.c
--- a/sys/arch/hpcarm/sa11x0/sa11x0.c   Sat Feb 24 12:41:20 2001 +0000
+++ b/sys/arch/hpcarm/sa11x0/sa11x0.c   Sat Feb 24 12:43:52 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sa11x0.c,v 1.2 2001/02/23 04:31:19 ichiro Exp $        */
+/*     $NetBSD: sa11x0.c,v 1.3 2001/02/24 12:43:52 toshii Exp $        */
 
 /*-
  * Copyright (c) 2001, The NetBSD Foundation, Inc.  All rights reserved.
@@ -82,6 +82,7 @@
 };
 
 extern struct bus_space sa11x0_bs_tag;
+extern vaddr_t saipic_base;
 
 extern int SetCPSR(int, int);
 
@@ -154,6 +155,7 @@
        if (bus_space_map(sc->sc_iot, SAIPIC_BASE, SAIPIC_NPORTS,
                        0, &sc->sc_ioh))
                panic("%s: Cannot map registers\n", self->dv_xname);
+       saipic_base = sc->sc_ioh;
 
        printf("\n");
 
diff -r e23968466505 -r e226fab3c762 sys/arch/hpcarm/sa11x0/sa11x0_irq.S
--- a/sys/arch/hpcarm/sa11x0/sa11x0_irq.S       Sat Feb 24 12:41:20 2001 +0000
+++ b/sys/arch/hpcarm/sa11x0/sa11x0_irq.S       Sat Feb 24 12:43:52 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sa11x0_irq.S,v 1.2 2001/02/23 04:31:19 ichiro Exp $    */
+/*     $NetBSD: sa11x0_irq.S,v 1.3 2001/02/24 12:43:52 toshii Exp $    */
 
 /*
  * Copyright (c) 1998 Mark Brinicombe.
@@ -62,6 +62,10 @@
 Lspl_masks:
        .word   _C_LABEL(spl_masks)
 
+       .globl  _C_LABEL(saipic_base)
+_C_LABEL(saipic_base):
+       .word   0x00000000
+
 #ifdef INTR_DEBUG
 Ldbg_str:
        .asciz  "irq_entry %x %x\n"
@@ -84,8 +88,7 @@
 
        /* Load r8 with the SAIPIC interrupt requests */
 
-       mov     r10, #(SAIPIC_BASE_0)
-       add     r10, r10, #(SAIPIC_BASE_1)
+       ldr     r10, [pc, #_C_LABEL(saipic_base) - . - 8]
        ldr     r8, [r10, #(SAIPIC_IP << 2)]    /* Load IRQ pending register */
 
 #ifdef INTR_DEBUG
@@ -333,8 +336,7 @@
        ldr     r2, [r2]
        bic     r1, r1, r2
 
-       mov     r0, #(SAIPIC_BASE_0)
-       add     r0, r0, #(SAIPIC_BASE_1)
+       ldr     r0, [pc, #_C_LABEL(saipic_base) - . - 8]
        str     r1, [r0, #(SAIPIC_MR << 2)]     /* Set mask register */
 
        /* Restore old cpsr and exit */
diff -r e23968466505 -r e226fab3c762 sys/arch/hpcarm/sa11x0/sa11x0_reg.h
--- a/sys/arch/hpcarm/sa11x0/sa11x0_reg.h       Sat Feb 24 12:41:20 2001 +0000
+++ b/sys/arch/hpcarm/sa11x0/sa11x0_reg.h       Sat Feb 24 12:43:52 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sa11x0_reg.h,v 1.2 2001/02/23 04:31:19 ichiro Exp $    */
+/*     $NetBSD: sa11x0_reg.h,v 1.3 2001/02/24 12:43:52 toshii Exp $    */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
@@ -39,31 +39,19 @@
 #define _HPCARM_SA11X0_REG_H_
 
 /* Physical register base addresses */
-#define SAOST_HW_BASE          0x90000000      /* OS Timer */
-#define SARTC_HW_BASE          0x90010000      /* Real-Time Clock */
-#define SAPMR_HW_BASE          0x90020000      /* Power Manager */
-#define SARCR_HW_BASE          0x90030000      /* Reset Controller */
-#define SAGPIO_HW_BASE         0x90040000      /* GPIO */
-#define SAIPIC_HW_BASE         0x90050000      /* Interrupt Controller */
+#define SAOST_BASE             0x90000000      /* OS Timer */
+#define SARTC_BASE             0x90010000      /* Real-Time Clock */
+#define SAPMR_BASE             0x90020000      /* Power Manager */
+#define SARCR_BASE             0x90030000      /* Reset Controller */
+#define SAGPIO_BASE            0x90040000      /* GPIO */
+#define SAIPIC_BASE            0x90050000      /* Interrupt Controller */
 #define SACOM3_HW_BASE         0x80050000      /* UART 3  */
 
-#define SADMAC_HW_BASE         0xB0000000      /* DMA Controller */
-#define SALCD_HW_BASE          0xB0100000      /* LCD */
+#define SADMAC_BASE            0xB0000000      /* DMA Controller */
+#define SALCD_BASE             0xB0100000      /* LCD */
 
 /* Register base virtual addresses mapped by initarm() */
-#define SAOST_BASE             0xd0000000
-#define SARTC_BASE             0xd0001000
-#define SAPMR_BASE             0xd0002000
-#define SARCR_BASE             0xd0003000
-#define SAGPIO_BASE            0xd0004000
-#define SAIPIC_BASE            0xd0005000
-#define SAIPIC_BASE_0          0xd0000000 /* == IO_BASE XXX */
-#define SAIPIC_BASE_1          0x5000
-#define SADMAC_BASE            0xd0006000
-
-#define SACOM3_BASE            0xd000d000      /* UART 3  */
-
-#define SALCD_BASE             0xd0010000      /* LCD */
+#define SACOM3_BASE             0xd000d000
 
 /* Interrupt controller registers */
 #define SAIPIC_NPORTS          6