[src/trunk]: src/sys/arch/sparc/sparc Add a bunch of debugging code, #ifdef F...

[mycroft <mycroft%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/68d03f0f1c86
branches:  trunk
changeset: 481856:68d03f0f1c86
user:      mycroft <mycroft%NetBSD.org@localhost>
date:      Tue Feb 08 03:16:00 2000 +0000

description:
Add a bunch of debugging code, #ifdef FPU_DEBUG, which attempts to
trap FPU usage in the kernel.

diffstat:

 sys/arch/sparc/sparc/trap.c |  59 ++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 58 insertions(+), 1 deletions(-)

diffs (101 lines):

diff -r f3e4eba777db -r 68d03f0f1c86 sys/arch/sparc/sparc/trap.c
--- a/sys/arch/sparc/sparc/trap.c       Tue Feb 08 03:10:21 2000 +0000
+++ b/sys/arch/sparc/sparc/trap.c       Tue Feb 08 03:16:00 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: trap.c,v 1.87 1999/12/05 11:56:35 ragge Exp $ */
+/*     $NetBSD: trap.c,v 1.88 2000/02/08 03:16:00 mycroft Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -336,6 +336,18 @@
        pcb = &p->p_addr->u_pcb;
        p->p_md.md_tf = tf;     /* for ptrace/signals */
 
+#ifdef FPU_DEBUG
+       if (type != T_FPDISABLED && (tf->tf_psr & PSR_EF) != 0) {
+               if (cpuinfo.fpproc != p)
+                       panic("FPU enabled but wrong proc (0)");
+               savefpstate(p->p_md.md_fpstate);
+               p->p_md.md_fpumid = -1;
+               cpuinfo.fpproc = NULL;
+               tf->tf_psr &= ~PSR_EF;
+               setpsr(getpsr() & ~PSR_EF);
+       }
+#endif
+
        switch (type) {
 
        default:
@@ -392,6 +404,15 @@
        case T_FPDISABLED: {
                struct fpstate *fs = p->p_md.md_fpstate;
 
+#ifdef FPU_DEBUG
+               if ((tf->tf_psr & PSR_PS) != 0) {
+                       printf("FPU fault from kernel mode, pc=%x\n", pc);
+#if DDB
+                       Debugger();
+#endif
+               }
+#endif
+
                if (fs == NULL) {
                        fs = malloc(sizeof *fs, M_SUBPROC, M_WAITOK);
                        *fs = initfpstate;
@@ -719,6 +740,18 @@
                p = &proc0;
        sticks = p->p_sticks;
 
+#ifdef FPU_DEBUG
+       if ((tf->tf_psr & PSR_EF) != 0) {
+               if (cpuinfo.fpproc != p)
+                       panic("FPU enabled but wrong proc (1)");
+               savefpstate(p->p_md.md_fpstate);
+               p->p_md.md_fpumid = -1;
+               cpuinfo.fpproc = NULL;
+               tf->tf_psr &= ~PSR_EF;
+               setpsr(getpsr() & ~PSR_EF);
+       }
+#endif
+
        /*
         * Figure out what to pass the VM code, and ignore the sva register
         * value in v on text faults (text faults are always at pc).
@@ -884,6 +917,18 @@
                p = &proc0;
        sticks = p->p_sticks;
 
+#ifdef FPU_DEBUG
+       if ((tf->tf_psr & PSR_EF) != 0) {
+               if (cpuinfo.fpproc != p)
+                       panic("FPU enabled but wrong proc (2)");
+               savefpstate(p->p_md.md_fpstate);
+               p->p_md.md_fpumid = -1;
+               cpuinfo.fpproc = NULL;
+               tf->tf_psr &= ~PSR_EF;
+               setpsr(getpsr() & ~PSR_EF);
+       }
+#endif
+
        pc = tf->tf_pc;                 /* These are needed below */
        psr = tf->tf_psr;
 
@@ -1126,6 +1171,18 @@
        new = code & (SYSCALL_G7RFLAG | SYSCALL_G2RFLAG);
        code &= ~(SYSCALL_G7RFLAG | SYSCALL_G2RFLAG);
 
+#ifdef FPU_DEBUG
+       if ((tf->tf_psr & PSR_EF) != 0) {
+               if (cpuinfo.fpproc != p)
+                       panic("FPU enabled but wrong proc (3)");
+               savefpstate(p->p_md.md_fpstate);
+               p->p_md.md_fpumid = -1;
+               cpuinfo.fpproc = NULL;
+               tf->tf_psr &= ~PSR_EF;
+               setpsr(getpsr() & ~PSR_EF);
+       }
+#endif
+
        callp = p->p_emul->e_sysent;
        nsys = p->p_emul->e_nsysent;