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[src/trunk]: src/sys/arch/sparc64 Update the scheduler to the new locking sch...
details: https://anonhg.NetBSD.org/src/rev/9167dffa3c06
branches: trunk
changeset: 496457:9167dffa3c06
user: eeh <eeh%NetBSD.org@localhost>
date: Wed Aug 23 21:35:56 2000 +0000
description:
Update the scheduler to the new locking scheme.
diffstat:
sys/arch/sparc64/include/intr.h | 30 ++-
sys/arch/sparc64/include/psl.h | 13 +-
sys/arch/sparc64/sparc64/locore.s | 303 ++++++++++++++++++++-----------------
3 files changed, 186 insertions(+), 160 deletions(-)
diffs (truncated from 690 to 300 lines):
diff -r ead0fc8d88b2 -r 9167dffa3c06 sys/arch/sparc64/include/intr.h
--- a/sys/arch/sparc64/include/intr.h Wed Aug 23 21:16:45 2000 +0000
+++ b/sys/arch/sparc64/include/intr.h Wed Aug 23 21:35:56 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.5 2000/06/26 15:13:26 eeh Exp $ */
+/* $NetBSD: intr.h,v 1.6 2000/08/23 21:35:56 eeh Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -37,19 +37,21 @@
*/
/* XXX - arbitrary numbers; no interpretation is defined yet */
-#define IPL_NONE 0 /* nothing */
-#define IPL_SOFTINT 1 /* softint */
-#define IPL_SOFTCLOCK 1 /* timeouts */
-#define IPL_SOFTNET 1 /* protocol stack */
-#define IPL_BIO PIL_BIO /* block I/O */
-#define IPL_NET PIL_NET /* network */
-#define IPL_SOFTSERIAL 4 /* serial */
-#define IPL_TTY PIL_TTY /* terminal */
-#define IPL_IMP PIL_IMP /* memory allocation */
-#define IPL_AUDIO PIL_AUD /* audio */
-#define IPL_CLOCK PIL_CLOCK /* clock */
-#define IPL_SERIAL PIL_SER /* serial */
-#define IPL_HIGH 15 /* everything */
+#define IPL_NONE 0 /* nothing */
+#define IPL_SOFTINT 1 /* softint */
+#define IPL_SOFTCLOCK 1 /* timeouts */
+#define IPL_SOFTNET 1 /* protocol stack */
+#define IPL_BIO PIL_BIO /* block I/O */
+#define IPL_NET PIL_NET /* network */
+#define IPL_SOFTSERIAL 4 /* serial */
+#define IPL_TTY PIL_TTY /* terminal */
+#define IPL_IMP PIL_IMP /* memory allocation */
+#define IPL_AUDIO PIL_AUD /* audio */
+#define IPL_CLOCK PIL_CLOCK /* clock */
+#define IPL_SERIAL PIL_SER /* serial */
+#define IPL_SCHED PIL_SCHED /* scheduler */
+#define IPL_LOCK PIL_LOCK /* locks */
+#define IPL_HIGH PIL_HIGH /* everything */
#define __GENERIC_SOFT_INTERRUPTS
diff -r ead0fc8d88b2 -r 9167dffa3c06 sys/arch/sparc64/include/psl.h
--- a/sys/arch/sparc64/include/psl.h Wed Aug 23 21:16:45 2000 +0000
+++ b/sys/arch/sparc64/include/psl.h Wed Aug 23 21:35:56 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.15 2000/08/22 19:46:32 thorpej Exp $ */
+/* $NetBSD: psl.h,v 1.16 2000/08/23 21:35:56 eeh Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -91,6 +91,9 @@
#define PIL_FD 11
#define PIL_SER 12
#define PIL_AUD 13
+#define PIL_HIGH 15
+#define PIL_SCHED PIL_HIGH
+#define PIL_LOCK PIL_SCHED
/*
* SPARC V9 CCR register
@@ -402,10 +405,10 @@
/* second sparc timer interrupts at level 14 */
SPLHOLD(splstatclock, 14)
-SPLHOLD(splhigh, 15)
+SPLHOLD(splsched, PIL_SCHED)
+SPLHOLD(spllock, PIL_LOCK)
-#define splsched() splhigh()
-#define spllock() splhigh()
+SPLHOLD(splhigh, PIL_HIGH)
/* splx does not have a return value */
#ifdef SPLDEBUG
@@ -439,6 +442,8 @@
#define splserial() splzerialX(__FILE__, __LINE__)
#define splaudio() splaudioX(__FILE__, __LINE__)
#define splstatclock() splstatclockX(__FILE__, __LINE__)
+#define splsched() splschedX(__FILE__, __LINE__)
+#define spllock() spllockX(__FILE__, __LINE__)
#define splhigh() splhighX(__FILE__, __LINE__)
#define splx(x) splxX((x),__FILE__, __LINE__)
diff -r ead0fc8d88b2 -r 9167dffa3c06 sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Wed Aug 23 21:16:45 2000 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Wed Aug 23 21:35:56 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.93 2000/08/10 18:33:47 eeh Exp $ */
+/* $NetBSD: locore.s,v 1.94 2000/08/23 21:35:57 eeh Exp $ */
/*
* Copyright (c) 1996-1999 Eduardo Horvath
* Copyright (c) 1996 Paul Kranenburg
@@ -78,6 +78,7 @@
#include "opt_compat_sunos.h"
#include "opt_compat_netbsd32.h"
#include "opt_multiprocessor.h"
+#include "opt_lockdebug.h"
#include "assym.h"
#include <machine/param.h>
@@ -7511,13 +7512,13 @@
* the psr change when entering a new process, since this
* usually changes the CWP field (hence heavy usage of %g's).
*
- * %g1 = <free>; newpcb -- WARNING this register tends to get trashed
- * %g2 = %hi(_whichqs); newpsr
- * %g3 = p
- * %g4 = lastproc
- * %g5 = oldpsr (excluding ipl bits)
- * %g6 = %hi(cpcb)
- * %g7 = %hi(curproc)
+ * %l1 = <free>; newpcb
+ * %l2 = %hi(_whichqs); newpsr
+ * %l3 = p
+ * %l4 = lastproc
+ * %l5 = oldpsr (excluding ipl bits)
+ * %l6 = %hi(cpcb)
+ * %l7 = %hi(curproc)
* %o0 = tmp 1
* %o1 = tmp 2
* %o2 = tmp 3
@@ -7535,6 +7536,11 @@
* and note that the `last loaded process' is nonexistent.
*/
ENTRY(switchexit)
+ /*
+ * Since we're exiting we don't need to save locals or ins, so
+ * we won't need the next instruction.
+ */
+! save %sp, -CC64FSZ, %sp
flushw ! We don't have anything else to run, so why not
#ifdef DEBUG
save %sp, -CC64FSZ, %sp
@@ -7542,7 +7548,7 @@
restore
#endif
wrpr %g0, PSTATE_KERN, %pstate ! Make sure we're on the right globals
- mov %o0, %g2 ! save proc arg for exit2() call
+ mov %o0, %l2 ! save proc arg for exit2() call XXXXX
#ifdef SCHED_DEBUG
save %sp, -CC64FSZ, %sp
@@ -7564,8 +7570,8 @@
* destroy it. Call it any sooner and the register windows
* go bye-bye.
*/
- set _C_LABEL(idle_u), %g1
- sethi %hi(CPCB), %g6
+ set _C_LABEL(idle_u), %l1
+ sethi %hi(CPCB), %l6
#if 0
/* Get rid of the stack */
rdpr %ver, %o0
@@ -7578,15 +7584,13 @@
flushw ! DEBUG
#endif
- STPTR %g1, [%g6 + %lo(CPCB)] ! cpcb = &idle_u
+ STPTR %l1, [%l6 + %lo(CPCB)] ! cpcb = &idle_u
set _C_LABEL(idle_u) + USPACE - CC64FSZ, %o0 ! set new %sp
#ifdef _LP64
sub %o0, BIAS, %sp ! Maybe this should be a save?
#else
mov %o0, %sp ! Maybe this should be a save?
#endif
- save %sp,-CC64FSZ,%sp ! Get an extra frame for good measure
- flushw ! DEBUG this should not be needed
wrpr %g0, 0, %canrestore
wrpr %g0, 0, %otherwin
rdpr %ver, %l7
@@ -7594,26 +7598,34 @@
wrpr %l7, 0, %cleanwin
dec 1, %l7 ! NWINDOWS-1-1
wrpr %l7, %cansave
+ clr %fp ! End of stack.
+#ifdef DEBUG
flushw ! DEBUG
-#ifdef DEBUG
set _C_LABEL(idle_u), %l6
SET_SP_REDZONE(%l6, %l5)
#endif
wrpr %g0, PSTATE_INTR, %pstate ! and then enable traps
call _C_LABEL(exit2) ! exit2(p)
- mov %g2, %o0
-
+ mov %l2, %o0
+
+ call _C_LABEL(sched_lock_idle) ! Acquire sched_lock
+ nop
+
/*
* Now fall through to `the last switch'. %g6 was set to
* %hi(cpcb), but may have been clobbered in kmem_free,
* so all the registers described below will be set here.
*
+ * Since the process has exited we can blow its context
+ * out of the MMUs now to free up those TLB entries rather
+ * than have more useful ones replaced.
+ *
* REGISTER USAGE AT THIS POINT:
- * %g2 = %hi(_whichqs)
- * %g4 = lastproc
- * %g5 = oldpsr (excluding ipl bits)
- * %g6 = %hi(cpcb)
- * %g7 = %hi(curproc)
+ * %l2 = %hi(_whichqs)
+ * %l4 = lastproc
+ * %l5 = oldpsr (excluding ipl bits)
+ * %l6 = %hi(cpcb)
+ * %l7 = %hi(curproc)
* %o0 = tmp 1
* %o1 = tmp 2
* %o3 = whichqs
@@ -7622,17 +7634,17 @@
INCR(_C_LABEL(nswitchexit)) ! nswitchexit++;
INCR(_C_LABEL(uvmexp)+V_SWTCH) ! cnt.v_switch++;
- sethi %hi(_C_LABEL(sched_whichqs)), %g2
- clr %g4 ! lastproc = NULL;
- sethi %hi(CPCB), %g6
- sethi %hi(CURPROC), %g7
- LDPTR [%g6 + %lo(CPCB)], %g5
+ sethi %hi(_C_LABEL(sched_whichqs)), %l2
+ clr %l4 ! lastproc = NULL;
+ sethi %hi(CPCB), %l6
+ sethi %hi(CURPROC), %l7
+ LDPTR [%l6 + %lo(CPCB)], %l5
wr %g0, ASI_DMMU, %asi
- ldxa [CTX_SECONDARY] %asi, %g1 ! Don't demap the kernel
- brz,pn %g1, 1f
- set 0x030, %g1 ! Demap secondary context
- stxa %g1, [%g1] ASI_DMMU_DEMAP
- stxa %g1, [%g1] ASI_IMMU_DEMAP
+ ldxa [CTX_SECONDARY] %asi, %l1 ! Don't demap the kernel
+ brz,pn %l1, 1f
+ set 0x030, %l1 ! Demap secondary context
+ stxa %g1, [%l1] ASI_DMMU_DEMAP
+ stxa %g1, [%l1] ASI_IMMU_DEMAP
membar #Sync
1:
stxa %g0, [CTX_SECONDARY] %asi ! Clear out our context
@@ -7646,7 +7658,10 @@
*/
.globl idle
idle:
- STPTR %g0, [%g7 + %lo(CURPROC)] ! curproc = NULL;
+#if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
+ call _C_LABEL(sched_unlock_idle) ! Release sched_lock
+#endif
+ STPTR %g0, [%l7 + %lo(CURPROC)] ! curproc = NULL;
1: ! spin reading _whichqs until nonzero
wrpr %g0, PSTATE_INTR, %pstate ! Make sure interrupts are enabled
wrpr %g0, 0, %pil ! (void) spl0();
@@ -7670,39 +7685,31 @@
LOCTOGLOB
restore
#endif
- ld [%g2 + %lo(_C_LABEL(sched_whichqs))], %o3
- brnz,a,pt %o3, Lsw_scan
- wrpr %g0, PIL_CLOCK, %pil ! (void) splclock();
+ ld [%l2 + %lo(_C_LABEL(sched_whichqs))], %o3
+ brnz,pt %o3, notidle ! Something to run
+ nop
-#if 1 /* Don't enable the zeroing code just yet. */
- ba,a,pt %icc, 1b
- nop
-#else
+#if 0
! Check uvm.page_idle_zero
sethi %hi(_C_LABEL(uvm) + UVM_PAGE_IDLE_ZERO), %o3
ld [%o3 + %lo(_C_LABEL(uvm) + UVM_PAGE_IDLE_ZERO)], %o3
brz,pn %o3, 1b
nop
- /*
- * We must preserve several global registers across the call
- * to uvm_pageidlezero(). Use the %ix registers for this, but
- * since we might still be running in our our caller's frame
- * (if we came here from cpu_switch()), we need to setup a
- * frame first.
- */
- save %sp, -CCFSZ, %sp
- GLOBTOLOC
! zero some pages
call _C_LABEL(uvm_pageidlezero)
nop
-
- ! restore global registers again which are now
- ! clobbered by uvm_pageidlezero()
- LOCTOGLOB
- ba,pt %icc, 1b
- restore
-#endif
+#endif
+ ba,a,pt %xcc, 1b
+ nop ! spitfire bug
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