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[src/trunk]: src/sys/dev/pci As discussed on tech-net: don't suppress any PHY...



details:   https://anonhg.NetBSD.org/src/rev/19dd0494a6f7
branches:  trunk
changeset: 580745:19dd0494a6f7
user:      is <is%NetBSD.org@localhost>
date:      Sat May 07 09:15:44 2005 +0000

description:
As discussed on tech-net: don't suppress any PHYs to enable multiple
external PHYs. The internal PHY at MII (nr 31) will be the last instance,
so it won't be the default instance when external PHYs are present.

diffstat:

 sys/dev/pci/if_pcn.c |  22 ++++++++--------------
 1 files changed, 8 insertions(+), 14 deletions(-)

diffs (63 lines):

diff -r 800b85353774 -r 19dd0494a6f7 sys/dev/pci/if_pcn.c
--- a/sys/dev/pci/if_pcn.c      Sat May 07 02:38:41 2005 +0000
+++ b/sys/dev/pci/if_pcn.c      Sat May 07 09:15:44 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_pcn.c,v 1.25 2005/02/27 00:27:33 perry Exp $        */
+/*     $NetBSD: if_pcn.c,v 1.26 2005/05/07 09:15:44 is Exp $   */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -67,7 +67,7 @@
 #include "opt_pcn.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_pcn.c,v 1.25 2005/02/27 00:27:33 perry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_pcn.c,v 1.26 2005/05/07 09:15:44 is Exp $");
 
 #include "bpfilter.h"
 #include "rnd.h"
@@ -318,7 +318,6 @@
 
        uint32_t sc_csr5;               /* prototype CSR5 register */
        uint32_t sc_mode;               /* prototype MODE register */
-       int sc_phyaddr;                 /* PHY address */
 
 #if NRND > 0
        rndsource_element_t rnd_source; /* random source */
@@ -2093,12 +2092,13 @@
        /*
         * The built-in 10BASE-T interface is mapped to the MII
         * on the PCNet-FAST.  Unfortunately, there's no EEPROM
-        * word that tells us which PHY to use.  Since the 10BASE-T
-        * interface is always at PHY 31, we make a note of the
-        * first PHY that responds, and disallow any PHYs after
-        * it.  This is all handled in the MII read routine.
+        * word that tells us which PHY to use. 
+        * This driver used to ignore all but the first PHY to 
+        * answer, but this code was removed to support multiple 
+        * external PHYs. As the default instance will be the first
+        * one to answer, no harm is done by letting the possibly
+        * non-connected internal PHY show up.
         */
-       sc->sc_phyaddr = -1;
 
        /* Initialize our media structures and probe the MII. */
        sc->sc_mii.mii_ifp = ifp;
@@ -2158,17 +2158,11 @@
        struct pcn_softc *sc = (void *) self;
        uint32_t rv;
 
-       if (sc->sc_phyaddr != -1 && phy != sc->sc_phyaddr)
-               return (0);
-
        pcn_bcr_write(sc, LE_BCR33, reg | (phy << PHYAD_SHIFT));
        rv = pcn_bcr_read(sc, LE_BCR34) & LE_B34_MIIMD;
        if (rv == 0xffff)
                return (0);
 
-       if (sc->sc_phyaddr == -1)
-               sc->sc_phyaddr = phy;
-
        return (rv);
 }
 



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