[src/trunk]: src/sys/arch/prep ANSI'fy

[nonaka <nonaka%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c04870a54bd3
branches:  trunk
changeset: 511502:c04870a54bd3
user:      nonaka <nonaka%NetBSD.org@localhost>
date:      Wed Jun 20 14:19:28 2001 +0000

description:
ANSI'fy

diffstat:

 sys/arch/prep/include/intr.h |  50 ++++++++++++++++++++++----------------------
 sys/arch/prep/prep/extintr.c |  32 +++++++++------------------
 2 files changed, 36 insertions(+), 46 deletions(-)

diffs (212 lines):

diff -r 2a2afcbfcd3f -r c04870a54bd3 sys/arch/prep/include/intr.h
--- a/sys/arch/prep/include/intr.h      Wed Jun 20 14:11:45 2001 +0000
+++ b/sys/arch/prep/include/intr.h      Wed Jun 20 14:19:28 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intr.h,v 1.9 2001/06/19 11:56:27 nonaka Exp $  */
+/*     $NetBSD: intr.h,v 1.10 2001/06/20 14:19:28 nonaka Exp $ */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
  * the list.  The handler is called with its (single) argument.
  */
 struct intrhand {
-       int     (*ih_fun) __P((void *));
+       int     (*ih_fun)(void *);
        void    *ih_arg;
        u_long  ih_count;
        struct  intrhand *ih_next;
@@ -75,35 +75,38 @@
        int     ih_irq;
 };
 
-void setsoftclock __P((void));
-void clearsoftclock __P((void));
-int  splsoftclock __P((void));
-void setsoftnet   __P((void));
-void clearsoftnet __P((void));
-int  splsoftnet   __P((void));
+void setsoftclock(void);
+void clearsoftclock(void);
+int  splsoftclock(void);
+void setsoftnet(void);
+void clearsoftnet(void);
+int  splsoftnet(void);
 
-void do_pending_int __P((void));
+void do_pending_int(void);
 
-void ext_intr __P((void));
+void ext_intr(void);
 
-void enable_intr __P((void));
-void disable_intr __P((void));
+void enable_intr(void);
+void disable_intr(void);
 
-void *intr_establish __P((int, int, int, int (*) __P((void *)), void *));
-void intr_disestablish __P((void *));
+void *intr_establish(int, int, int, int (*)(void *), void *);
+void intr_disestablish(void *);
 
-void softnet __P((void));
-void softserial __P((void));
+void softnet(void);
+void softserial(void);
 
-static __inline int splraise __P((int));
-static __inline void spllower __P((int));
-static __inline void set_sint __P((int));
+static __inline int splraise(int);
+static __inline void spllower(int);
+static __inline void set_sint(int);
 
 extern volatile int cpl, ipending, astpending, tickspending;
+extern int imen;
 extern int imask[];
 extern long intrcnt[];
+extern unsigned intrcnt2[];
 extern struct intrhand *intrhand[];
 extern int intrtype[];
+extern paddr_t prep_intr_reg;
 
 /*
  *  Reorder protection in the following inline functions is
@@ -111,8 +114,7 @@
  * seems to detect and then doen't move instructions past....
  */
 static __inline int
-splraise(newcpl)
-       int newcpl;
+splraise(int newcpl)
 {
        int oldcpl;
 
@@ -124,8 +126,7 @@
 }
 
 static __inline void
-spllower(newcpl)
-       int newcpl;
+spllower(int newcpl)
 {
 
        __asm__ volatile("sync; eieio\n");      /* reorder protect */
@@ -138,8 +139,7 @@
 /* Following code should be implemented with lwarx/stwcx to avoid
  * the disable/enable. i need to read the manual once more.... */
 static __inline void
-set_sint(pending)
-       int     pending;
+set_sint(int pending)
 {
        int     msrsave;
 
diff -r 2a2afcbfcd3f -r c04870a54bd3 sys/arch/prep/prep/extintr.c
--- a/sys/arch/prep/prep/extintr.c      Wed Jun 20 14:11:45 2001 +0000
+++ b/sys/arch/prep/prep/extintr.c      Wed Jun 20 14:19:28 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: extintr.c,v 1.8 2001/06/19 11:56:28 nonaka Exp $       */
+/*     $NetBSD: extintr.c,v 1.9 2001/06/20 14:19:28 nonaka Exp $       */
 /*     $OpenBSD: isabus.c,v 1.12 1999/06/15 02:40:05 rahnds Exp $      */
 
 /*-
@@ -99,11 +99,10 @@
 
 #include <dev/isa/isavar.h>
 
-void intr_calculatemasks __P((void));
-int fakeintr __P((void *));
-void ext_intr __P((void));
+void intr_calculatemasks(void);
+int fakeintr(void *);
+void ext_intr(void);
 
-extern paddr_t prep_intr_reg;
 extern int cold;
 int imen = 0xffffffff;
 volatile int cpl, ipending, astpending, tickspending;
@@ -113,8 +112,7 @@
 unsigned intrcnt2[ICU_LEN];
 
 int
-fakeintr(arg)
-       void *arg;
+fakeintr(void *arg)
 {
 
        return 0;
@@ -129,13 +127,12 @@
  *  times the spl level is changed.
  */
 void
-ext_intr()
+ext_intr(void)
 {
        u_int8_t irq;
        int r_imen;
        int pcpl;
        struct intrhand *ih;
-       extern long intrcnt[];
 
        /* what about enabling external interrupt in here? */
        pcpl = splhigh();       /* Turn off all */
@@ -168,12 +165,7 @@
 }
 
 void *
-intr_establish(irq, type, level, ih_fun, ih_arg)
-        int irq;
-        int type;
-        int level;
-        int (*ih_fun) __P((void *));
-        void *ih_arg;
+intr_establish(int irq, int type, int level, int (*ih_fun)(void *), void *ih_arg)
 {
        struct intrhand **p, *q, *ih;
        static struct intrhand fakehand = {fakeintr};
@@ -208,7 +200,7 @@
         * generally small.
         */
        for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
-               ;
+               continue;
 
        /*
         * Actually install a fake handler momentarily, since we might be doing
@@ -237,8 +229,7 @@
 }
 
 void
-intr_disestablish(arg)
-        void *arg;      
+intr_disestablish(void *arg)
 {
        struct intrhand *ih = arg;
        int irq = ih->ih_irq;
@@ -274,7 +265,7 @@
  * happen very much anyway.
  */
 void
-intr_calculatemasks()
+intr_calculatemasks(void)
 {
        int irq, level;
        struct intrhand *q;
@@ -367,7 +358,7 @@
 }
 
 void
-do_pending_int()
+do_pending_int(void)
 {
        struct intrhand *ih;
        int irq;
@@ -375,7 +366,6 @@
        int hwpend;
        int emsr, dmsr;
        static int processing;
-       extern long intrcnt[];
 
        if (processing)
                return;