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[src/trunk]: src/sys/arch/mips/mips It seems r4k_sdcache_wb_range_NN() functi...



details:   https://anonhg.NetBSD.org/src/rev/1b9d4963e7c9
branches:  trunk
changeset: 553174:1b9d4963e7c9
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Sat Oct 11 09:09:15 2003 +0000

description:
It seems r4k_sdcache_wb_range_NN() function can't handle
R10000 L2 cache (which is 2-way set-associative write-back),
so use r4k_sdcache_wbinv_range_NN() for workaround until someone
implement proper r10k_sdcache_*() ops.

Problem reported by Christopher SEKIYA.

diffstat:

 sys/arch/mips/mips/cache.c |  12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diffs (42 lines):

diff -r e7e6a96edf3e -r 1b9d4963e7c9 sys/arch/mips/mips/cache.c
--- a/sys/arch/mips/mips/cache.c        Sat Oct 11 09:06:03 2003 +0000
+++ b/sys/arch/mips/mips/cache.c        Sat Oct 11 09:09:15 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache.c,v 1.21 2003/10/05 11:10:25 tsutsui Exp $       */
+/*     $NetBSD: cache.c,v 1.22 2003/10/11 09:09:15 tsutsui Exp $       */
 
 /*
  * Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.21 2003/10/05 11:10:25 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.22 2003/10/11 09:09:15 tsutsui Exp $");
 
 #include "opt_cputype.h"
 #include "opt_mips_cache.h"
@@ -781,7 +781,11 @@
                                mips_cache_ops.mco_sdcache_inv_range =
                                    r4k_sdcache_inv_range_generic;
                                mips_cache_ops.mco_sdcache_wb_range =
+#if 0 /* XXX needs real wb functions for r10k 2way L2 cache */
                                    r4k_sdcache_wb_range_generic;
+#else
+                                   r4k_sdcache_wbinv_range_generic;
+#endif
                                break;
 
                        case 128:
@@ -794,7 +798,11 @@
                                mips_cache_ops.mco_sdcache_inv_range =
                                    r4k_sdcache_inv_range_128;
                                mips_cache_ops.mco_sdcache_wb_range =
+#if 0 /* XXX needs real wb functions for r10k 2way L2 cache */
                                    r4k_sdcache_wb_range_128;
+#else
+                                   r4k_sdcache_wbinv_range_128;
+#endif
                                break;
 
                        default:



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