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[src/trunk]: src/lib/libc/arch/mips/fplib Do the minimum work to make this co...



details:   https://anonhg.NetBSD.org/src/rev/4d332d999b70
branches:  trunk
changeset: 482780:4d332d999b70
user:      mycroft <mycroft%NetBSD.org@localhost>
date:      Tue Feb 22 01:18:28 2000 +0000

description:
Do the minimum work to make this compile with -Werror.

diffstat:

 lib/libc/arch/mips/fplib/fplib_glue.c           |  17 ++++-
 lib/libc/arch/mips/fplib/softfloat-macros.h     |  90 +++++++++++++++++++++++++
 lib/libc/arch/mips/fplib/softfloat-specialize.h |   3 +
 lib/libc/arch/mips/fplib/softfloat.c            |  15 +++-
 4 files changed, 120 insertions(+), 5 deletions(-)

diffs (197 lines):

diff -r 3bd0b1ea9162 -r 4d332d999b70 lib/libc/arch/mips/fplib/fplib_glue.c
--- a/lib/libc/arch/mips/fplib/fplib_glue.c     Tue Feb 22 01:16:48 2000 +0000
+++ b/lib/libc/arch/mips/fplib/fplib_glue.c     Tue Feb 22 01:18:28 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fplib_glue.c,v 1.1.1.1 1999/09/16 12:18:25 takemura Exp $      */
+/*     $NetBSD: fplib_glue.c,v 1.2 2000/02/22 01:18:28 mycroft Exp $   */
 
 /*-
  * Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -38,6 +38,21 @@
 #include "environment.h"
 #include "softfloat.h"
 
+int __eqsf2(float32 a,float32 b);
+int __eqdf2(float64 a,float64 b);
+int __nesf2(float32 a,float32 b);
+int __nedf2(float64 a,float64 b);
+int __gtsf2(float32 a,float32 b);
+int __gtdf2(float64 a,float64 b);
+int __gesf2(float32 a,float32 b);
+int __gedf2(float64 a,float64 b);
+int __ltsf2(float32 a,float32 b);
+int __ltdf2(float64 a,float64 b);
+int __lesf2(float32 a,float32 b);
+int __ledf2(float64 a,float64 b);
+float32 __negsf2(float32 a);
+float64 __negdf2(float64 a);
+
 /********************************* COMPARISONS ********************************/
 
 /*
diff -r 3bd0b1ea9162 -r 4d332d999b70 lib/libc/arch/mips/fplib/softfloat-macros.h
--- a/lib/libc/arch/mips/fplib/softfloat-macros.h       Tue Feb 22 01:16:48 2000 +0000
+++ b/lib/libc/arch/mips/fplib/softfloat-macros.h       Tue Feb 22 01:18:28 2000 +0000
@@ -29,6 +29,96 @@
 ===============================================================================
 */
 
+INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr );
+INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr );
+INLINE void
+ shift64ExtraRightJamming(
+     bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ shift128Right(
+     bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ shift128RightJamming(
+     bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ shift128ExtraRightJamming(
+     bits64 a0,
+     bits64 a1,
+     bits64 a2,
+     int16 count,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr
+ );
+INLINE void
+ shortShift128Left(
+     bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ shortShift192Left(
+     bits64 a0,
+     bits64 a1,
+     bits64 a2,
+     int16 count,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr
+ );
+INLINE void
+ add128(
+     bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ add192(
+     bits64 a0,
+     bits64 a1,
+     bits64 a2,
+     bits64 b0,
+     bits64 b1,
+     bits64 b2,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr
+ );
+INLINE void
+ sub128(
+     bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ sub192(
+     bits64 a0,
+     bits64 a1,
+     bits64 a2,
+     bits64 b0,
+     bits64 b1,
+     bits64 b2,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr
+ );
+INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr );
+INLINE void
+ mul128By64To192(
+     bits64 a0,
+     bits64 a1,
+     bits64 b,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr
+ );
+INLINE void
+ mul128To256(
+     bits64 a0,
+     bits64 a1,
+     bits64 b0,
+     bits64 b1,
+     bits64 *z0Ptr,
+     bits64 *z1Ptr,
+     bits64 *z2Ptr,
+     bits64 *z3Ptr
+ );
+INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 );
+INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 );
+INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 );
+INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 );
+
 /*
 -------------------------------------------------------------------------------
 Shifts `a' right by the number of bits given in `count'.  If any nonzero
diff -r 3bd0b1ea9162 -r 4d332d999b70 lib/libc/arch/mips/fplib/softfloat-specialize.h
--- a/lib/libc/arch/mips/fplib/softfloat-specialize.h   Tue Feb 22 01:16:48 2000 +0000
+++ b/lib/libc/arch/mips/fplib/softfloat-specialize.h   Tue Feb 22 01:18:28 2000 +0000
@@ -29,6 +29,9 @@
 ===============================================================================
 */
 
+flag float32_is_nan( float32 a );
+flag float64_is_nan( float64 a );
+
 /*
 -------------------------------------------------------------------------------
 Underflow tininess-detection mode, statically initialized to default value.
diff -r 3bd0b1ea9162 -r 4d332d999b70 lib/libc/arch/mips/fplib/softfloat.c
--- a/lib/libc/arch/mips/fplib/softfloat.c      Tue Feb 22 01:16:48 2000 +0000
+++ b/lib/libc/arch/mips/fplib/softfloat.c      Tue Feb 22 01:18:28 2000 +0000
@@ -32,6 +32,17 @@
 #include "environment.h"
 #include "softfloat.h"
 
+INLINE bits32 extractFloat32Frac( float32 a );
+INLINE int16 extractFloat32Exp( float32 a );
+INLINE flag extractFloat32Sign( float32 a );
+INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig );
+INLINE bits64 extractFloat64Frac( float64 a );
+INLINE int16 extractFloat64Exp( float64 a );
+INLINE flag extractFloat64Sign( float64 a );
+INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig );
+uint32 float32_to_uint32_round_to_zero( float32 a );
+uint32 float64_to_uint32_round_to_zero( float64 a );
+
 /*
 -------------------------------------------------------------------------------
 Floating-point rounding mode, extended double-precision rounding precision,
@@ -1178,7 +1189,6 @@
     flag zSign;
     uint64 absA;
     int8 shiftCount;
-    bits32 zSig;
 
     if ( a == 0 ) return 0;
     zSign = ( a < 0 );
@@ -2175,7 +2185,6 @@
 flag float32_le_quiet( float32 a, float32 b )
 {
     flag aSign, bSign;
-    int16 aExp, bExp;
 
     if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
          || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
@@ -2974,7 +2983,6 @@
     int16 aExp, zExp;
     bits64 aSig, zSig, doubleZSig;
     bits64 rem0, rem1, term0, term1;
-    float64 z;
 
     aSig = extractFloat64Frac( a );
     aExp = extractFloat64Exp( a );
@@ -3117,7 +3125,6 @@
 flag float64_le_quiet( float64 a, float64 b )
 {
     flag aSign, bSign;
-    int16 aExp, bExp;
 
     if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
          || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )



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