[src/trunk]: src/sys/dev/ic Update, based on i8259a manual.

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/fe61850cbc3b
branches:  trunk
changeset: 511556:fe61850cbc3b
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Thu Jun 21 18:57:04 2001 +0000

description:
Update, based on i8259a manual.

diffstat:

 sys/dev/ic/i8259reg.h |  33 ++++++++++++++-------------------
 1 files changed, 14 insertions(+), 19 deletions(-)

diffs (66 lines):

diff -r 965c28384924 -r fe61850cbc3b sys/dev/ic/i8259reg.h
--- a/sys/dev/ic/i8259reg.h     Thu Jun 21 18:46:22 2001 +0000
+++ b/sys/dev/ic/i8259reg.h     Thu Jun 21 18:57:04 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i8259reg.h,v 1.1 2001/06/21 03:43:43 thorpej Exp $     */
+/*     $NetBSD: i8259reg.h,v 1.2 2001/06/21 18:57:04 thorpej Exp $     */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -55,16 +55,17 @@
 #define        PIC_ICW1        0x00    /* Initialization Command Word 1 (w) */
 #define        ICW1_IC4        (1U << 0)       /* ICW4 Write Required */
 #define        ICW1_SNGL       (1U << 1)       /* 1 == single, 0 == cascade */
-#define        ICW1_ADI        (1U << 2)       /* XXX */
+#define        ICW1_ADI        (1U << 2)       /* CALL address interval */
 #define        ICW1_LTIM       (1U << 3)       /* 1 == intrs are level trigger */
-#define        ICW_SELECT(x)   ((x) << 4)      /* select ICW */
+#define        ICW1_SELECT     (1U << 4)       /* select ICW1 */
+#define        ICW1_IVA(x)     ((x) << 5)      /* interrupt vector address (MCS-80) */
 
 #define        PIC_ICW2        0x01    /* Initialization Command Word 2 (w) */
 #define        ICW2_VECTOR(x)  ((x) & 0xf8)    /* vector base address */
 #define        ICW2_IRL(x)     ((x) << 0)      /* interrupt request level */
 
 #define        PIC_ICW3        0x01    /* Initialization Command Word 3 (w) */
-#define        ICW3_CASCADE    (1U << 2)       /* cascaded mode enable */
+#define        ICW3_CASCADE(x) (1U << (x))     /* cascaded mode enable */
 #define        ICW3_SIC(x)     ((x) << 0)      /* slave identifcation code */
 
 #define        PIC_ICW4        0x01    /* Initialization Command Word 4 (w) */
@@ -82,26 +83,20 @@
 
 #define        PIC_OCW2        0x00    /* Operational Control Word 2 (w) */
 #define        OCW2_SELECT     (0)             /* select OCW2 */
-#define        OCW2_OP(x)      ((x) << 5)      /* operation; see below */
+#define        OCW3_EOI        (1U << 5)       /* EOI */
+#define        OCW3_SL         (1U << 6)       /* specific */
+#define        OCW3_R          (1U << 7)       /* rotate */
 #define        OCW2_ILS(x)     ((x) << 0)      /* interrupt level select */
 
-#define        OCW2_OP_CLR_ROTATE_IN_AUTO_EOI_MODE     0
-#define        OCW2_OP_NON_SPECIFIC_EOI_CMD            1
-#define        OCW2_OP_NOOP                            2
-#define        OCW2_OP_SPECIFIC_EOI_CMD                3
-#define        OCW2_OP_SET_ROTATE_IN_AUTO_EOI_MODE     4
-#define        OCW2_OP_ROTATE_ON_NON_SPEC_EOI_CMD      5
-#define        OCW2_OP_SET_PRIORITY_CMD                6
-#define        OCW2_OP_ROTATE_ON_SPEC_EOI_CMD          7
-
 #define        PIC_OCW3        0x00    /* Operational Control Word 3 (r/w) */
-#define        OCW3_SMM        (1U << 6)       /* special mask mode */
-#define        OCW3_ESMM       (1U << 5)       /* enable special mask mode */
+#define        OCW3_SSMM       (1U << 6)       /* set special mask mode */
+#define        OCW3_SMM        (1U << 5)       /* 1 = enable smm, 0 = disable */
 #define        OCW3_SELECT     (1U << 3)       /* select OCW3 */
 #define        OCW3_POLL       (1U << 2)       /* poll mode command */
-#define        OCW3_RR_CMD(x)  ((x) << 0)      /* register read command */
+#define        OCW3_RR         (1U << 1)       /* register read */
+#define        OCW3_RIS        (1U << 0)       /* 1 = read IS, 0 = read IR */
 
-#define        OCW3_RR_CMD_READ_IRQ    2
-#define        OCW3_RR_CMD_READ_IS     3
+#define        OCW3_POLL_IRQ(x) ((x) & 0x7f)
+#define        OCW3_POLL_PENDING (1U << 7)
 
 #endif /* _DEV_IC_I8259REG_H_ */